Abstract:
A trigger, includes: a first voltage input terminal; a bias voltage input terminal; a first bias transistor having a scaling of N to a first component of an external device; a comparator transistor having a scaling of N to a second component of the external device; a first switch transistor and a second switch transistor; a shunt transistor having a control terminal connected to the first voltage input terminal, a second terminal connected to the second terminal of the second switch transistor, and a first terminal connected to the first terminal of the comparator transistor. The shunt transistor has an enlarging scale of M to the comparator transistor. A voltage output terminal is respectively connected to the second terminal of the first switch transistor, the control terminal of the second switch transistor, and the second terminal of the comparator transistor.
Abstract:
A circuit includes an oscillator having a driver and a resonator. The driver receives a supply voltage at a supply input and provides a drive output to drive the resonator to generate an oscillator output signal. A power converter receives an input voltage and generates the supply voltage to the supply input of the driver. The power converter varies the supply voltage based on an adjust command supplied to a command input of the power converter. A detector monitors a voltage level of the oscillator output signal. A controller sets the adjust command to the power converter to control the supply voltage to the supply input of the driver such that the voltage level of the oscillator output signal is set at or above a predetermined threshold voltage.
Abstract:
A process that provides the ability to incorporate a self exciting loop (SEL) algorithm into a digital LLRF system. The present digital SEL provides for conversion from the Cartesian domain to the Polar domain, wherein most signal processing is accomplished, and back to Cartesian. By handling most signal processing in the Polar (phase & amplitude) domain, a perfect amplitude limiter can be realized and simpler logic operations can be used. When operational, cavity recovery from faults will be tuner-less. At high gradients, ˜20 MV/m, like those needed for the upgraded cryomodules, the Lorentz detuning will be many bandwidths, making cavity turn-on problematic with out some tuner based compensation or other algorithmic solution. The present SEL solves this problem and allows cavity recovery from cryogenic trips, wherein cavities have been known to detune 1000's of Hz. Other applications such has He processing can also be implemented in situ without additional electronics.
Abstract:
A voltage-controlled oscillator (VCO) circuit includes first, second, third, and fourth transistors, wherein said third and fourth transistors bias the second and first transistors, respectively. First and second capacitances communicate with the first, second, third, and fourth transistors. A first input receives a first capacitance adjustment signal. At least one second input receives a second capacitance adjustment signal. The first capacitance has a first end connected to he first input and the third transistor. The second capacitance has a first end connected to the second input and the fourth transistor.
Abstract:
A broad-band cavity-tuned transistor oscillator includes a field effect device having capacitive feedback from source to drain and having a gate capacitively coupled to a cavity for producing an output signal that is frequency selectable according to cavity resonance, which resonance is determined by translation position of a mechanical tuning plunger coupled to the cavity and the degree of capacitive feedback.
Abstract:
Disclosed herein is an integrated circuit amplifier for use in a crystal oscillator, the integrated circuit amplifier comprising: a transistor; a voltage dependent capacitance circuit, wherein the voltage dependent capacitance circuit comprises a device with a voltage dependent capacitance and a bias circuit of the voltage dependent capacitance; and a node; wherein the node is connected to a terminal of the transistor and the integrated circuit amplifier is configured such that an intrinsic capacitance of the transistor is dependent on the mean voltage at the node; wherein the node is also connected to a terminal of the voltage dependent capacitance circuit and the integrated circuit amplifier is configured such that an effective capacitance of the node is dependent on both the intrinsic capacitance of the transistor and the voltage dependent capacitance of said device; and wherein, in use, the voltage dependent capacitance circuit reduces the amount of change of the effective capacitance of the node when the mean voltage at the node changes.
Abstract:
An apparatus and method are disclosed for improving the stability of the frequency of vibration of an oscillator signal produced by an oscillator circuit. In a preferred embodiment of the present invention, a quartz crystal resonator is one arm of a bridge which generates a bridge signal which varies in accordance with the vibrating frequency of the resonator. A synchronous demodulator responds to the bridge signal for producing an error signal. A control circuit receives the error signal and changes its reactance when the resonator is no longer vibrating at its unperturbed resonance frequency so that the vibration frequency of the resonator connected to the control circuit is returned to its resonant frequency. An automatic level control circuit is also included for controlling the drive level of the signal exciting the resonator.
Abstract:
A trigger, includes: a first voltage input terminal; a bias voltage input terminal; a first bias transistor having a scaling of N to a first component of an external device; a comparator transistor having a scaling of N to a second component of the external device; a first switch transistor and a second switch transistor; a shunt transistor having a control terminal connected to the first voltage input terminal, a second terminal connected to the second terminal of the second switch transistor, and a first terminal connected to the first terminal of the comparator transistor. The shunt transistor has an enlarging scale of M to the comparator transistor. A voltage output terminal is respectively connected to the second terminal of the first switch transistor, the control terminal of the second switch transistor, and the second terminal of the comparator transistor.