CRYSTAL OSCILLATOR STARTUP TIME REDUCTION
    2.
    发明申请
    CRYSTAL OSCILLATOR STARTUP TIME REDUCTION 有权
    水晶振荡器启动时间缩短

    公开(公告)号:US20150333694A1

    公开(公告)日:2015-11-19

    申请号:US14584726

    申请日:2014-12-29

    CPC classification number: H03B5/06 H03B5/362 H03B5/364 H03B5/368

    Abstract: A circuit includes a crystal oscillator to generate an output frequency for a circuit. A driving oscillator generates a startup signal having a driving frequency that is provided to activate the crystal oscillator. The driving frequency of the startup signal is varied over a range of frequencies that encompass the operating frequency of the crystal oscillator to facilitate startup of the crystal oscillator.

    Abstract translation: 电路包括用于产生电路的输出频率的晶体振荡器。 驱动振荡器产生具有提供以激活晶体振荡器的驱动频率的启动信号。 启动信号的驱动频率在包含晶体振荡器的工作频率的频率范围内变化以便于启动晶体振荡器。

    VOLTAGE MONITOR USING A CAPACITIVE DIGITAL-TO-ANALOG CONVERTER

    公开(公告)号:US20220283207A1

    公开(公告)日:2022-09-08

    申请号:US17824505

    申请日:2022-05-25

    Abstract: One example relates to a monitoring circuit that includes a capacitive digital-to-analog converter that receives a binary code, a reference voltage, a monitored voltage, and a ground reference, the capacitive digital-to-analog converter outputting an analog signal based on the binary code, the reference voltage, the monitored voltage, and the ground reference. The monitoring circuit further includes a comparator including a first input coupled to receive the analog signal and a second input coupled to the reference voltage, the comparator comparing the analog signal to the reference voltage and outputting a comparator signal based on the comparison. The monitoring circuit yet further includes a binary code generator that generates the binary code based on the comparator signal, the binary code approximating a magnitude of the monitored voltage.

    VOLTAGE MONITOR
    4.
    发明申请
    VOLTAGE MONITOR 审中-公开

    公开(公告)号:US20190094275A1

    公开(公告)日:2019-03-28

    申请号:US15717219

    申请日:2017-09-27

    Abstract: One example relates to a monitoring circuit that includes a capacitive digital-to-analog converter that receives a binary code, a reference voltage, a monitored voltage, and a ground reference, the capacitive digital-to-analog converter outputting an analog signal based on the binary code, the reference voltage, the monitored voltage, and the ground reference. The monitoring circuit further includes a comparator including a first input coupled to receive the analog signal and a second input coupled to the reference voltage, the comparator comparing the analog signal to the reference voltage and outputting a comparator signal based on the comparison. The monitoring circuit yet further includes a binary code generator that generates the binary code based on the comparator signal, the binary code approximating a magnitude of the monitored voltage.

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