公开(公告)号：KR100467324B1

公开(公告)日：2005-01-24

申请号：KR1020020074463

申请日：2002-11-27

Applicant: 한국전자통신연구원

Inventor： 김대업 ,  주범순 ,  정해원 ,  이형호

IPC: G06F13/00

CPC classification number: G06F13/387

Abstract: An apparatus for managing Ethernet physical layer registers and a method thereof are provided. The apparatus comprises a central processing unit (CPU) with an external bus interface function, and an interface conversion unit which is connected to the CPU through the external bus interface, converts the external bus interface into management data input/output (MDIO) interface and performs communications with the physical layer apparatus.

Abstract translation: 提供了一种用于管理以太网物理层寄存器的装置及其方法。 该设备包括具有外部总线接口功能的中央处理单元（CPU）和通过外部总线接口连接到CPU的接口转换单元，将外部总线接口转换成管理数据输入/输出（MDIO）接口，以及 执行与物理层设备的通信。

公开(公告)号：KR100455880B1

公开(公告)日：2004-11-06

申请号：KR1020020066485

申请日：2002-10-30

Applicant: 한국전자통신연구원

Inventor： 신동범 ,  이형섭 ,  이형호

IPC: H04L12/28

Abstract: PURPOSE: A method for transceiving a forwarding table of a distributed router system is provided to simultaneously transmit a forwarding table to all LP boards from a routing process board in a UDP/IP/broadcast method when driving an initial system, and to apply a TCP/IP/unicast method when transmitting the table to an LP board having an error and a newly inserted LP board, thereby reducing time for transmitting the forwarding table. CONSTITUTION: If a distributed router system starts operating(S301), a routing process board generates a forwarding table(S302) and configures the forwarding table by adding CRC values for both the forwarding table and size value information on the forwarding table(S303). The routing process board adds a UDP header to the forwarding table(S304), and adds an Ethernet header for broadcasting a destination address(S305). The routing process board transmits the forwarding table where the UDP header and the Ethernet header are included to an IPC board(S306). The IPC board checks the destination address of the received forwarding table, recognizes that the forwarding table is to be broadcasted, and broadcasts the forwarding table to all LP boards(S307).

Abstract translation: 目的：提供一种用于收发分布式路由器系统的转发表的方法，以在驱动初始系统时以UDP / IP /广播方法从路由处理板向所有LP板同时发送转发表，并且将TCP / IP /单播方式传输到有错误的LP板和新插入的LP板时，减少了传输转发表的时间。 构成：如果分布式路由器系统开始运行（S301），则路由处理板生成转发表（S302），并通过在转发表上增加用于转发表和大小值信息的CRC值来配置转发表（S303）。 路由处理板向转发表添加UDP报头（S304），并添加用于广播目的地地址的以太网报头（S305）。 路由处理板将包括UDP报头和以太网报头的转发表发送到IPC板（S306）。 IPC板检查接收到的转发表的目的地地址，识别转发表将被广播，并且将转发表广播到所有LP板（S307）。

公开(公告)号：KR100454502B1

公开(公告)日：2004-10-28

申请号：KR1020020032178

申请日：2002-06-08

Applicant: 한국전자통신연구원

Inventor： 최길영 ,  박재우 ,  이규호 ,  이형호

IPC: H04L12/66

CPC classification number: H04L65/1043 ,  H04L29/06027 ,  H04L47/10 ,  H04L47/15 ,  H04L47/18 ,  H04L47/2408 ,  H04L47/2416 ,  H04L47/2441 ,  H04L65/1069 ,  H04L65/80 ,  H04M7/006

Abstract: An apparatus for providing quality of service (QoS) of voice over IP (VoIP) traffic on IP routers and a forwarding method therefor are provided. The VoIP quality of QoS providing apparatus in an Internet protocol (IP) network containing data traffic and providing VoIP service includes: a softswitch which performs a VoIP call coordination function in the IP network and transmits VoIP call connection information in a multicast transmission method; and a router which provides QoS in forwarding a VoIP packet, by using the information received from the softswitch. With the VoIP QoS service providing apparatus, reliable multicast transmission method is enabled in providing VoIP connection information to each router, and when a softswitch additionally processes related functions, the load to the system is reduced. Since in the router, VoIP QoS flow and QoS information are added to a flow table for performing packet forwarding, VoIP packet recognition and QoS providing are enabled. In addition, flow management for providing QoS in a variety of shapes in the similar manner can be provided.

Abstract translation: 提供了一种用于在IP路由器上提供IP语音（VoIP）业务的服务质量（QoS）的装置及其转发方法。 在包含数据业务并提供VoIP业务的因特网协议（IP）网络中的QoS质量提供装置包括：软交换机，其在IP网络中执行VoIP呼叫协调功能并以多播传输方法发送VoIP呼叫连接信息; 以及通过使用从软交换机接收的信息来提供转发VoIP分组的QoS的路由器。 通过VoIP QoS服务提供装置，使得可靠的多播传输方法能够向每个路由器提供VoIP连接信息，并且当软交换机额外处理相关功能时，减少了对系统的负载。 由于在路由器中，VoIP QoS流和QoS信息被添加到用于执行分组转发的流表中，所以启用VoIP分组识别和QoS提供。 另外，可以提供用于以类似方式提供各种形状的QoS的流管理。

公开(公告)号：KR1020040084622A

公开(公告)日：2004-10-06

申请号：KR1020030019823

申请日：2003-03-29

Applicant: 한국전자통신연구원 ,  학교법인 한국정보통신학원

Inventor： 강호용 ,  최현균 ,  리콴 ,  유태환 ,  이형호 ,  이상국 ,  이만섭 ,  오영훈

IPC: H04B10/50 ,  H04B10/564

CPC classification number: H01S5/0683 ,  H01S5/0427 ,  H01S5/06812

Abstract: PURPOSE: A device of compensating for characteristics of a laser diode and an optical transmitter comprising device thereof are provided to change a bias current of a laser diode according to a temperature change, and to regularly output an optical power of the laser diode. CONSTITUTION: An optical output detector(2) detects an optical power outputted from a laser diode(1), and converts the optical power into a voltage. A bias current controller(3) detects a maximum level of the voltage, and outputs the first control value corresponding to a difference between the maximum level and the first reference voltage. A modulation current controller(4) detects a minimal level of the voltage, and outputs the second control value corresponding to a difference between the minimal level and the second reference voltage. A laser diode driver(5) outputs a driving current in accordance with the first and second control values to the laser diode(1).

Abstract translation: 目的：提供补偿激光二极管的特性的装置及其装置的光发射器，以根据温度变化改变激光二极管的偏置电流，并定期输出激光二极管的光功率。 构成：光输出检测器（2）检测从激光二极管（1）输出的光功率，并将光功率转换为电压。 偏置电流控制器（3）检测电压的最大电平，并且输出与最大电平和第一参考电压之间的差对应的第一控制值。 调制电流控制器（4）检测电压的最小电平，并且输出对应于最小电平和第二参考电压之间的差的第二控制值。 激光二极管驱动器（5）根据第一和第二控制值向激光二极管（1）输出驱动电流。

公开(公告)号：KR100450769B1

公开(公告)日：2004-10-01

申请号：KR1020020067392

申请日：2002-11-01

Applicant: 한국전자통신연구원

Inventor： 나용욱 ,  주범순 ,  정해원 ,  이형호

IPC: H04L12/24 ,  H04L12/70

Abstract: PURPOSE: A control device of a redundant packet switch system is provided to be implemented by using a simple sequence logic combination function, and to carry out a redundant switching process in hardware method, thereby enabling a high-speed redundant switching function without packet loss. CONSTITUTION: Each of packet switch boards comprises as follows. Switching portions(310-1,310-2) receive packet data transmitted from line cards through redundant packet data paths, and transmit the packet data to destination line cards by switching the packet data. Processor portions(320-1,320-2) activate plural switch ports of the switching portions(310-1,310-2), have system buses corresponding to the redundant packet data paths, and control redundancy of the first and second packet switch boards. State controllers(330-1,330-2) monitor states of each packet switch board by the two packet switch boards, input control signals from the processor portions(320-1,320-2) to generate activate/inactivate signals, and perform operational switching processes. Clock controllers(340-1,340-2) carry out clock synchronization processes with the packet switch boards.

Abstract translation: 目的：提供一种冗余分组交换系统的控制装置，通过使用简单的顺序逻辑组合功能来实现，并且以硬件方式执行冗余切换处理，由此实现高速冗余切换功能而无分组丢失。 组成：每个分组交换板包括如下。 交换部分（310-1,310-2）通过冗余分组数据路径接收从线卡发送的分组数据，并且通过切换分组数据将分组数据发送到目的地线路卡。 处理器部分（320-1,320-2）激活交换部分（310-1,310-2）的多个交换机端口，具有对应于冗余分组数据通路的系统总线以及控制第一和第二分组交换机板的冗余。 状态控制器（330-1,330-2）通过两个分组交换板监视每个分组交换板的状态，从处理器部分（320-1,320-2）输入控制信号以产生激活/去激活信号，并执行操作切换过程。 时钟控制器（340-1,340-2）与分组交换板执行时钟同步过程。

公开(公告)号：KR100441879B1

公开(公告)日：2004-07-27

申请号：KR1020010054454

申请日：2001-09-05

Applicant: 한국전자통신연구원

Inventor： 최우영 ,  김법중 ,  안병준 ,  이형호

IPC: H04L12/50

Abstract: PURPOSE: An ATM switch system capable of variably dualizing transmission line boards and a method thereof are provided to add variable dualization function of the transmission line boards, thereby reducing transmission cost of a system and reducing cost for expanding switch boards. CONSTITUTION: Switching elements(201a,201b) receive ATM(Asynchronous Transfer Mode) cells for switching the ATM cells. Input switch interfaces(203-1a,...,203-na,203-1b,...,203-nb) receive the ATM cells through a plurality of paths for transmitting to the switching elements(201a,201b). Output switch interfaces(204-1a,...,204-na,204-1b,...,204-nb) receive the switched ATM cells from the switching elements(201a,201b) to transmit to the outside. Switch interface control units(202a,202b) controls to transmit the ATM cells in the first mode or the second mode. In the first mode, only ATM cells input through any one path are transmitted to the switching element(201a,201b). In the second mode, the ATM cells are transmitted through each independent path in the switching element(201a,201b).

Abstract translation: 目的：提供一种能够对传输线路板进行可变二元化的ATM交换机系统及其方法，以增加传输线路板的可变二元化功能，从而降低系统的传输成本并降低扩展交换板的成本。 构成：交换单元（201a，201b）接收用于交换ATM信元的ATM（异步传输模式）信元。 输入交换接口（203-1a，...，203-na，203-1b，...，203-nb）通过多条路径接收ATM信元，以便传送给交换单元（201a，201b）。 输出交换接口（204-1a，...，204-na，204-1b，...，204-nb）从交换单元（201a，201b）接收交换的ATM单元以传输到外部。 交换接口控制单元（202a，202b）进行控制以在第一模式或第二模式下发送ATM信元。 在第一种模式中，只有通过任何一个路径输入的ATM信元被传送到交换单元（201a，201b）。 在第二种模式中，ATM信元通过交换单元（201a，201b）中的每个独立路径传输。

公开(公告)号：KR100440572B1

公开(公告)日：2004-07-21

申请号：KR1020010084082

申请日：2001-12-24

Applicant: 한국전자통신연구원

Inventor： 이상우 ,  이형섭 ,  이형호

IPC: H04L12/50

Abstract: PURPOSE: A system for clock synchronization between duplexing switch boards and line connection boards is provided to select synchronous clocks of an active switch board in each line connection board according to control signals outputted from the switch boards, thereby implementing clock synchronization between the duplexing switch boards and each of the line connection boards. CONSTITUTION: Each of switch boards(210,220) comprises as follows. Switching units(211,221) perform switching processes, generate control signals showing duplexing states by exchanging duplexing control signals between the switch boards(210,220), and output the control signals to many line connection boards(230,240). Clock circuits(212,222) generate synchronous clocks by using predetermined synchronous reference clocks, and output the synchronous clocks to the line connection boards(230,240). Each of the line connection boards(230,240) comprises as follows. Synchronous clock selectors(231,241) receive the control signals and the synchronous clocks, decide the control signals of each of the switch boards(210,220), and select synchronous clocks outputted from an active switch board. Interface functional units(232,242) perform line interfacing processes by using the selected synchronous clocks.

Abstract translation: 目的：提供一种双工交换板和线路连接板之间时钟同步的系统，根据交换板输出的控制信号，选择每个线路连接板上的主用交换板的同步时钟，实现双工交换板之间的时钟同步 和每个线路连接板。 组成：每个交换板（210,220）包括如下。 切换单元（211,221）执行切换过程，通过在交换板（210,220）之间交换双工控制信号来产生示出双工状态的控制信号，并将控制信号输出到多个线路连接板（230,240）。 时钟电路（212,222）通过使用预定的同步参考时钟产生同步时钟，并将同步时钟输出到线路连接板（230,240）。 每个线路连接板（230,240）包括如下。 同步时钟选择器（231,241）接收控制信号和同步时钟，确定每个开关板（210,220）的控制信号，并选择从有源开关板输出的同步时钟。 接口功能单元（232,242）通过使用选择的同步时钟来执行线路接口处理。

公开(公告)号：KR100440571B1

公开(公告)日：2004-07-21

申请号：KR1020010084081

申请日：2001-12-24

Applicant: 한국전자통신연구원

Inventor： 이상우 ,  이강복 ,  이형섭 ,  이형호

IPC: H04L7/00

Abstract: PURPOSE: A system for clock synchronization between a dual switch board and a line connection board is provided, which achieves clock synchronization between the switch board and the line connection board, and supplies a stable clock to each line connection board. CONSTITUTION: The system comprises two dual switch boards(210,220) performing switching according to a switching signal and a plurality of line connection boards(230,240) connected to the switch boards by a signal line to transmit a synchronous clock. Each switch board includes a switching part(211,221) performing switching according to the switching signal and generating a control signal indicating dual state by exchanging the dual control signal between each switch board, and a synchronous clock circuit part(212,222) generating a self clock using a clock generated by an external synchronous reference clock or a clock generated by self oscillation and then supplying it to the switching part. The synchronous clock circuit part generates a synchronous clock using the clock generated by self oscillation or the external synchronous reference clock only when the present switching board is in an active state, and supplies the generated synchronous clock to the plurality of line connection boards through the signal line.

Abstract translation: 目的：提供双交换板和线路连接板之间的时钟同步系统，实现交换板和线路连接板之间的时钟同步，并为每个线路连接板提供稳定的时钟。 构成：系统包括根据切换信号执行切换的两个双交换板（210,220）和通过信号线连接到交换板的多个线路连接板（230,240）以传送同步时钟。 每个开关板包括根据开关信号执行开关并且通过在每个开关板之间交换双重控制信号来生成指示双重状态的控制信号的开关部件（211,221），以及使用生成自身时钟的同步时钟电路部件（212,222） 由外部同步参考时钟产生的时钟或由自振产生的时钟，然后将其提供给切换部分。 同步时钟电路部分仅在当前开关板处于激活状态时使用由自激振荡产生的时钟或外部同步参考时钟产生同步时钟，并且通过信号将产生的同步时钟提供给多个线路连接板 线。

公开(公告)号：KR100440586B1

公开(公告)日：2004-07-19

申请号：KR1020020031365

申请日：2002-06-04

Applicant: 한국전자통신연구원

Inventor： 김법중 ,  최우영 ,  전종암 ,  변성혁 ,  김학서 ,  장원석 ,  김재영 ,  안병준 ,  이형호

IPC: H04L12/02

Abstract: PURPOSE: A line interface module in a router and a routing system having the same are provided to integrate many line interfaces into a single line interface module and to execute fault management, inter-processor connection, switch interfacing, etc., through the line interface module. CONSTITUTION: A line interface module(10) consists of a sub switching card(13) and a backplane(14). The sub switching card(13) comprises line cards(11,12), a sub switch(131), and switch input-output buffers(133,134). The backplane(14) connects between the line cards(11,12) and the sub switching card(13). Each line card(11,12) comprises physical link ports(111,114,121,124), physical layer interface parts(112,15,122,125), and network processors(113,116,123,126). The network processors(113,116,123,126) process the packet switching and forwarding function of an OSI(Open System Interconnection) 3/4+ layer. The sub switch(131) executes sub switching to target data channels for the data supplied from the line cards(11,12) and the switch input-output buffers(133,134). The switch input-output buffers(133,134) buffer the data inputted/outputted between the switch of a routing system and the sub switch(131).

Abstract translation: 目的：提供路由器中的线路接口模块和具有该线路接口模块的路由系统，以将多个线路接口集成到单个线路接口模块中，并通过线路接口执行故障管理，处理器间连接，交换机接口等 模块。 构成：线路接口模块（10）由子交换卡（13）和背板（14）组成。 子交换卡（13）包括线卡（11,12），子开关（131）和开关输入输出缓冲器（133,134）。 背板（14）连接线卡（11,12）和副切换卡（13）之间。 每个线卡（11,12）包括物理链路端口（111,114,121,124），物理层接口部分（112,15,122,125）和网络处理器（113,116,123,126）。 网络处理器（113,116,123,126）处理OSI（开放系统互连）3/4 +层的分组交换和转发功能。 子开关（131）对线卡（11,12）和开关输入输出缓冲器（133,134）提供的数据执行子切换，以达到目标数据通道。 开关输入 - 输出缓冲器（133,134）缓冲在路由系统的开关和子开关（131）之间输入/输出的数据。

公开(公告)号：KR100440585B1

公开(公告)日：2004-07-19

申请号：KR1020020028844

申请日：2002-05-24

Applicant: 한국전자통신연구원

Inventor： 김대업 ,  정해원 ,  강성수 ,  이형호

IPC: H04L12/70 ,  H04L25/14

CPC classification number: H04L25/14 ,  H04J3/0608

Abstract: An apparatus, a method and a storage medium for carrying out a deskew among multiple lanes for use in a division transmission of large-capacity data. The method comprises the steps of detecting alignment characters from data streams on a lane-by-lane basis, determining whether a skew among the lanes is generated by comparing reception points of the alignment characters for respective lanes, if the skew among the lanes is generated, storing the alignment characters in a first storage column of a shift register on the lane-by-lane basis and storing data being subsequent to the alignment characters in a second storage column, at a time of a last alignment character detection, setting a last storage section on the lane-by-lane basis and indicating an alignment completion, shifting the data to output the data stored in the first storage column when the data is inputted into the last storage section, and intactly outputting the data streams before the deskew is completely accomplished in the storage device and outputting the aligned data streams after the deskew is completely accomplished.

Abstract translation: 本发明提供一种用于在多个通道中执行用于大容量数据的分割传输的去偏移的装置，方法和存储介质。 该方法包括以下步骤：在逐车道的基础上从数据流中检测对准字符，如果产生车道之间的歪斜，则通过比较各车道的对准字符的接收点来确定车道之间是否产生歪斜 ，在逐行通道的基础上将对准字符存储在移位寄存器的第一存储列中，并且在最后对准字符检测时将对准字符之后的数据存储在第二存储列中，设置最后一个对准字符 存储部分，并且指示对齐完成;当数据被输入到最后的存储部分时移位数据以输出存储在第一存储列中的数据，并且在抗扭斜之前完整地输出数据流 完全在存储设备中完成并在完成完成去歪斜后输出对齐的数据流。