Abstract:
데이터 경로의 전환이 필요한 이벤트마다에 대응되는 미리 정의된 예비 전송 테이블들- 전송 테이블들은 모든 물리적, 논리적 경로에 대한 목적지 정보를 포함함-을 저장하고, 내부 통신 수단을 통해 수신한 정보를 기초로, 전송 테이블의 변경 여부를 판단하여 예비 전송 테이블들 중 이벤트에 대응하는 예비 전송 테이블을 선택하여 활성화 시키는 데이터 처리기를 각각 포함하는 복수 개의 라인 정합 블록들; 및 복수 개의 라인 정합 블록들 간에 데이터 경로의 전환이 필요한 이벤트와 관련된 정보를 주고받는 공유 버스를 포함하는, 데이터 처리 시스템을 제공할 수 있다.
Abstract:
PURPOSE: An interface block in a data communication device is provided to efficiently change an active line. CONSTITUTION: Multiple lines are assigned to a virtual output port(511). An output forwarding unit(513) stores virtual output port information and information about an active line operating in an active state among the multiple lines. A data processing device(502) changes the active line corresponding to the virtual output port by modifying the active line information stored in the output forwarding unit. [Reference numerals] (503) Input forwarding unit; (513,515) Output forwarding unit
Abstract:
PURPOSE: A 40 giga class Ethernet line interface device which supports a network synchronization function and a selective physical layer interface is provided to improve availability of a board by being variably applied according to a system necessity. CONSTITUTION: A Ethernet physical layer interface(100) provides a 40 gigabit Ethernet physical layer interface of port 1 and a 10 gigabit Ethernet physical layer interface of port 4. A packet processor(300) processes a packet by receiving the packet from a physical layer interface which is selected by a user in the Ethernet physical layer interface or transmitting the packet to the selected physical layer interface. If a network synchronization recovery clock is received from the interfaces of the physical layer interface, a clock controller(400) examines effectiveness and transmits to a line interface controller. The line interface controller(200) determines whether a 40 gigabit Ethernet line interface of port 1 or a 10 gigabit Ethernet line interface of port 4 is used or not and exchanges data of an initialization provision, an operation state collection, and an management of a main processor board. [Reference numerals] (101) 40 gigabit physical layer interface; (102) 10 gigabit physical layer interface 1; (103) 10 gigabit physical layer interface 2; (104) 10 gigabit physical layer interface 3; (105) 10 gigabit physical layer interface 4; (200) Line interface device controller; (201) Debugging port; (300) Packet processing unit; (400) Clock control unit; (500) Switch fabric interface unit; (600) Main processor board; (700) Switch fabric board; (800) System clock distribution unit
Abstract:
PURPOSE: A data processing device and a data processing method thereof are provided to recognize PUs(Processing Units) of the data processing device in real time and to change data or functions requiring sharing and synchronization. CONSTITUTION: If an event occurs in PU blocks, an interrupt service routine included in a PU block notifies the event to an AP(Application Processing) block among the PU blocks(340). The PU blocks include PUs and the interrupt service routine. The interrupt service routine included in the AP block notifies the event to LP(Local Processing) blocks included in a data processing device(370). The interrupt service routines included in the AP and the LP blocks change data stored in the AP and the LP blocks according to information about the event(390). [Reference numerals] (310) Load data path information; (320) Monitor a data path state; (330) Is an event occurred?; (340) Interrupt generation(LP→AP); (350) Read event information from the LP; (360) Change data path information in the AP; (370) Interrupt occurrence(AP→LP); (380) Read event information from the AP; (390) Change data path information in the LP; (AA) Start; (BB) No; (CC) Yes
Abstract:
링 네트워크 시스템은 링(ring) 형태로 이루어진 전송매체를 통해 순차적으로 연결되어 있는 복수의 노드 장치를 포함한다. 링 네트워크 시스템에서 복수의 노드 장치 중 제1 노드 장치에서 전송한 광 신호를 상기 제1 노드 장치를 제외한 나머지 노드 장치에서는 통과시키고, 상기 나머지 노드 장치 중 상기 광 신호의 목적지에 해당하는 제2 노드 장치에서는 상기 광 신호를 추출하면서 상기 제2 노드 장치의 다음 노드 장치로 통과시킬 수 있다. 링 네트워크, 광 신호, 광 파장, WDM(Wavelength Division Multiplexing)
Abstract:
PURPOSE: An application processing module apparatus is provided to facilitate the addition of a new function and flexibly perform processing operation according to the kind of additional functions. CONSTITUTION: An NP(Network Processing) unit(120) processes a flow, data and a packet. An AP(Application Processing) unit(110) is connected to the NP unit and shares an address area. First and second matching units are physically connected to the NP unit and the AP unit. A data path relay unit(130) transceives data through a switch interface and supports the extension of an AP module through a data path.
Abstract:
PURPOSE: A method for recognizing network ID-based position of a data communication system and a sub-module device are provided to search network ID and to check the position of a configuration card. CONSTITUTION: A method for recognizing network ID-based position of a data communication system comprises: a step of storing position value inputted through a card connector(300); a step of setting network ID of a switching unit and a switching control unit by referring to the position value(320); a step of trying data communication with the switching control unit using network ID(340); and a step of recognizing the position of a configuration card(350-370).
Abstract:
PURPOSE: A communication node of an integrated node system and a communication method thereof are provided to offer an expanded communication infrastructure which extends an interface. CONSTITUTION: An IO node transfers data through an internal interface to a computing node(S200). The computing node creates the received data to share control information. The computing node transfers the share control information through the internal interface to the IO node(S220). On the basis of the share control information, the IO node or the computing node communicates with the external communication device of an integrated node system through an external interface(S230).
Abstract:
본 발명은 가변 시리얼 정합 방식의 메모리 시스템 및 그 메모리의 액세스 방법에 관한 것이다. 본 발명에 따른 메모리 시스템은, 적어도 하나의 메모리; 및 상기 각 메모리와 시리얼(serial) 포트를 통해 상기 시리얼 포트의 물리적인 위치 및 순서에 상관없이 가변적으로 시리얼 링크 연결을 설정하고 상기 시리얼 링크 연결을 통해 메모리 데이터를 시리얼 방식으로 송수신하는 메모리 컨트롤러를 포함한다. 메모리, 메모리 컨트롤러, 메모리 인터페이스, 시리얼 링크, 시리얼 포트, 물리 포트, 가상 포트, 메모리 데이터 전송, 메모리 데이터 변환
Abstract:
An apparatus and a method for processing packets in a fast router are provided to increase system efficiency by reducing the memory of a forwarding information table, which a forwarding processor occupies, and decreasing IPC(Inter Processor Communication) messages between a control processor and the forwarding processor. A fast router comprises a control processor(100), an Ethernet switch(200), and a forwarding processor(300). The control processor(100) comprises a prefix table(110), a next hop table(120), and an L2(Layer 2) address table(130). The forwarding processor(300) comprises input/output processors(310,340), input/output network processors(320,350), and a switch fabric(330). The input processor(310) is comprised of a prefix table(311) and a next hop table(312). The output processor(340) comprises an L2 indirect address table(341), which is directly indexed from the next hop table(312) of the input processor(310), and an L2 direct table, which is composed of a hashing table for destination IP addresses. Also the output processor(340) comprises an IPv4 packet queue(343) and an IPv6 packet queue(344) to store packets according to their respective types until L2 addresses are learned.