Abstract:
An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.
Abstract:
An AD conversion apparatus includes a shift signal generating portion configured to generate n shift signals ( n is a natural number greater than one) of which amplitudes are different from each other; a shift signal controlling portion configured to control the shift signal generating portion; a compounding portion configured to compound input analog signal and the n shift signals sequentially into n first signals; an AD converting portion configured to execute AD conversion to convert the n first signals into n second signals; and a signal processing portion configured to calculate an average of the n second signals to generate output digital signal.
Abstract:
An analog to digital converter circuit (20) in a sampling data detection channel of a disk drive synchronously samples user data in a data track areas at a first quantization resolution and samples servo bursts from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. An offset circuit (60) provides a predetermined analog offset signal to a combining circuit (160, 170) which combines it with an incoming analog signal to provide a composite signal during a servo burst sampling interval. An analog to digital converter (180, 190) samples the composite signal during the servo spoke burst sampling interval, and synchronously samples the analog signal during a user data sampling interval. A digital averaging circuit (210) averages the servo spoke samples over a predetermined averaging interval to provide averaged burst samples having increased bit resolution.
Abstract:
An analog to digital converter circuit (20) in a sampling data detection channel of a disk drive synchronously samples user data in a data track areas at a first quantization resolution and samples servo bursts from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. An offset circuit (60) provides a predetermined analog offset signal to a combining circuit (160, 170) which combines it with an incoming analog signal to provide a composite signal during a servo burst sampling interval. An analog to digital converter (180, 190) samples the composite signal during the servo spoke burst sampling interval, and synchronously samples the analog signal during a user data sampling interval. A digital averaging circuit (210) averages the servo spoke samples over a predetermined averaging interval to provide averaged burst samples having increased bit resolution.
Abstract:
A current measurement circuit comprising a mutual inductance transformer (3), an integration circuit (2), and a dither circuit (1) which adds a square wave to the signal from the transformer (3) before the input of the integration circuit (2) in order that the integration circuit (2) provides a signal representing the measured current perturbed by a triangular dither signal.
Abstract:
A system for analogue to digital conversion comprising a means (4) for receiving an input analogue signal, a dither means for adding a dither signal and an analogue to digital converter (2) for converting the combined input signal and dither signal to a digital value, characterised in that the dither means provides a dither signal of a form comprising a first periodic dither signal having superimposed and being shaped by a second signal having at least one component which varies the first periodic dither signal over at least one quantisation interval of the analogue to digital converter.
Abstract:
A circuit (40) for analog-to-digital conversion is disclosed comprising multiplexed ADCs (44, 46). Dithering (16) is introduced (20) into the circuit before conversion and subtracted out (26) of the resulting digital output stream. Gain control feedback loops (50, 51, 52, 54) are employed to eliminate non-unity gain error of the dither signal and multiplexed ADC differential gain errors. Correlation (52) between the digital output stream and the dither signal is used to detect a non-unity condition and derive gain control feedback. Correlation with the dither signal is also used to detect gain differences between multiplexed ADCs and generate corrective feedback.
Abstract:
An A/D converter system has an A/D converter element (10) which provides a first predetermined number of digital output bits for each input analog signal, an addition means (12,70) for adding linear slope potential to said input analog signal, and a calculator (14) for providing an average of a plurality of digital output signals of said A/D converter element so that said average has larger number of bits than said first predetermined number. Said addition means is implemented by a time constant circuit (70) which functions as an integral circuit for an input analog signal, and functions as a differential circuit for a slope potential.
Abstract:
a A narrow bandwidth analog-to-digital conversion (ADC) system is described in the context of the color burst processing and burst phase detecting circuitry of a digital color television receiver. The ADC (14) includes a dither generator which adds a dither signal to either the analog input signal (10) or to the reference signal (38) used by the ADC. This dither signal increases in magnitude by 1/16 of an LSB value at a rate one-quarter of the burst frequency and changes in sign at one-half of the burst frequency. This signal passes through a low-pass filter (18) in the chrominance channel providing an increase in sample resolution by averaging the samples in a chroma band-pass filter and in the phase detecting circuitry (30).