中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

15 records (took 0.019 seconds)

    ENCODING METHOD, CODE GENERATING METHOD AND MODULATION ENCODER
    1.
    发明专利
    ENCODING METHOD, CODE GENERATING METHOD AND MODULATION ENCODER 失效

    公开(公告)号：JPH11355144A

    公开(公告)日：1999-12-24

    申请号：JP6894299

    申请日：1999-03-15

    Applicant: QUANTUM CORP

    Inventor： PATAPOUTIAN ARA ,  STANDER JENNIFER ,  MCEWEN PETER ,  ZAFER BAHJAT ,  FITZPATRICK JAMES

    IPC: G11B20/14 ,  G11B5/09 ,  G11B20/10 ,  H03M5/14 ,  H03M7/14

    Abstract: PROBLEM TO BE SOLVED: To encode the sequence of 32-bit digital data words into that of 32-bit code words in accordance with previously fixed min. 0-run length and max. 0-run length for magnetic medium recording. SOLUTION: The method includes the division of the respective data words into eight data nibbles and judgement indicating whether any one of the data nibbles includes only zero or not. At the time of no code violation, the eight data nibbles are mapped into the seven code nibbles and the four bits of a five-bit code sub-word and a fifth control bit is set to one. When more than one code violation exist, the places are padded in at least the five-bit code sub-word and in other required code nibbles and, then, the data nibbles toward a normal code sub-word and the nibble place are mapped again to the code place which originally includes the data nibble judged to be the code violation.

    High rate run length limited modulation codes
    2.
    发明专利
    High rate run length limited modulation codes 未知

    公开(公告)号：GB2337909A

    公开(公告)日：1999-12-01

    申请号：GB9905837

    申请日：1999-03-15

    Applicant: QUANTUM CORP

    Inventor： PATAPOUTIAN ARA ,  STANDER JENNIFER ,  MCEWEN PETER ,  FITZPATRICK JAMES ,  ZAFER BAHJAT

    IPC: G11B20/14 ,  G11B5/09 ,  G11B20/10 ,  H03M5/14 ,  H03M7/14 ,  H04L25/497

    Abstract: A method and apparatus for encoding a sequence of 32 bit digital data words into a sequence of 33 bit code words in consonance with predetermined minimum zero tun length (d) and predetermined maximum zero run length (k) for recording upon a magnetic medium within a magnetic recording channel is disclosed. The method comprises steps of dividing each data word into eight data nibbles, determining whether any data nibble contains all zeros. If no code violation, mapping the eight data nibbles to seven code nibbles and to four bits of a five bit code sub-word and setting a fifth control bit to one. If one or more code violations are present, embedding code violation locations within at least the five bit code sub-word and other code nibbles if necessary and remapping data nibbles ordinarily directed to the code sub-word and nibble locations to code locations otherwise containing the data nibbles determined to be code violations.

    DATA AND SERVO SAMPLING IN SYNCHRONOUS DATA DETECTION CHANNEL
    4.
    发明公开
    DATA AND SERVO SAMPLING IN SYNCHRONOUS DATA DETECTION CHANNEL 失效
    日内瓦同业公会日期：

    公开(公告)号：EP0898813A4

    公开(公告)日：2001-04-18

    申请号：EP97952555

    申请日：1997-12-18

    Applicant: QUANTUM CORP

    Inventor： PATAPOUTIAN ARA ,  FISHER KEVIN D ,  BUCH BRUCE D

    IPC: G11B5/55 ,  G11B5/596 ,  G11B20/10 ,  G11B20/12 ,  G11B21/08 ,  G11B21/10 ,  H03M1/20 ,  H03M1/48

    CPC classification number: G11B5/59605 ,  G11B5/5547 ,  G11B5/59655 ,  G11B20/10009 ,  G11B20/1258 ,  G11B21/085 ,  G11B21/106 ,  H03M1/201

    Abstract: An analog to digital converter circuit (20) in a sampling data detection channel of a disk drive synchronously samples user data in a data track areas at a first quantization resolution and samples servo bursts from the spoke areas at a second quantization resolution effectively greater than said first quantization resolution. An offset circuit (60) provides a predetermined analog offset signal to a combining circuit (160, 170) which combines it with an incoming analog signal to provide a composite signal during a servo burst sampling interval. An analog to digital converter (180, 190) samples the composite signal during the servo spoke burst sampling interval, and synchronously samples the analog signal during a user data sampling interval. A digital averaging circuit (210) averages the servo spoke samples over a predetermined averaging interval to provide averaged burst samples having increased bit resolution.

    Abstract translation: 磁盘驱动器的采样数据检测通道中的模拟 - 数字转换器电路以第一量化分辨率同步采样数据轨道区域中的用户数据，并且以比第一量化分辨率有效地大的第二量化分辨率从轮辐区域采样伺服脉冲串 量化分辨率。 偏移电路向组合电路提供预定的模拟偏移信号，该组合电路将其与输入模拟信号组合，以在辐射伺服脉冲串采样间隔期间提供复合信号。 模数转换器在伺服轮询突发采样间隔期间对复合信号进行采样，并在用户数据采样间隔期间同步采样模拟信号。 数字平均电路在预定的平均间隔上对伺服轮辐样本进行平均，以提供具有增加的比特分辨率的平均突发样本。

    High rate run length limited (RLL) modulation encoders/decoders
    6.
    发明专利
    High rate run length limited (RLL) modulation encoders/decoders 未知

    公开(公告)号：GB2347599A

    公开(公告)日：2000-09-06

    申请号：GB9930869

    申请日：1999-12-24

    Applicant: QUANTUM CORP

    Inventor： PATAPOUTIAN ARA ,  WENG LIH-JYH

    IPC: G11B20/14 ,  H03M7/12 ,  H03M13/31 ,  H03M5/14 ,  H03M7/00

    Abstract: A modulation encoder 14 includes a base conversion circuit 23 that converts a partitioned input data stream from a first base representation (e.g. base 16) into a second (e.g. base 15) in accordance with the size of groups of bits. Intermediate values in the second base representation are formed and a residual value logic 26 performs modulo-arithmetic, the result of which is fed to a one's complement logic 28 to produce output codewords. The modulation decoder (fig. 3) performs an inverse process to arrive at the original data. The invention provides a high code rate (e.g. 32/33) with a low value constraint length (k), e.g. the maximum number of consecutive zeros being 6, that is relatively easy to implement. Application is to magnetic storage systems, in particular tape drives.

Patent Agency Ranking