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    METHODES ET SYSTEMES DE GESTION D'UNE INTERCONNEXION
    213.
    发明公开
    METHODES ET SYSTEMES DE GESTION D'UNE INTERCONNEXION 有权
    方法和系统管理的互连

    公开(公告)号：EP2960794A1

    公开(公告)日：2015-12-30

    申请号：EP15168734.0

    申请日：2015-05-21

    Applicant: Bull S.A.S.

    Inventor： Saintes, Maxime

    IPC: G06F11/00 ,  H04B1/74 ,  H04L12/703

    CPC classification number: G06F11/201 ,  G06F11/00 ,  G06F11/07 ,  G06F11/0745 ,  G06F11/0793 ,  G06F13/4027 ,  G06F2201/85 ,  H04B1/74 ,  H04L45/22 ,  H04L45/28

    Abstract: Une carte (1) de circuit imprimé comprenant
    - une première interface de connexion (11) configurée pour gérer une première interconnexion (10) avec cette carte (1), ladite première interconnexion (10) incluant une pluralité de liens ;
    - une deuxième interface de connexion (13) configurée pour gérer une deuxième interconnexion (20) avec cette carte (1);
    - la première interface de connexion (11) étant en outre configurée pour détecter l'occurrence d'une panne dans un lien de la première interconnexion (10) ;
    - la deuxième interface de connexion étant en outre configurée
    ∘ pour partager l'information d'occurrence de la panne;
    ∘ pour sélectionner une solution de repli parmi une liste de solutions de repli;
    ∘ pour supprimer la solution de repli sélectionnée une fois appliquée ;

    - le processeur étant en outre configuré
    ∘ pour appliquer la solution de repli sélectionnée à la première interconnexion;
    ∘ pour réinitialiser la première interconnexion.

    MEMORY SYSTEM AND MEMORY SYSTEM CONTROL METHOD
    215.
    发明授权
    MEMORY SYSTEM AND MEMORY SYSTEM CONTROL METHOD 有权
    存储系统及控制方法存储系统

    公开(公告)号：EP2482194B1

    公开(公告)日：2013-12-25

    申请号：EP09849758.9

    申请日：2009-09-25

    Applicant: Fujitsu Limited

    Inventor： TAKAKU, Kazuya

    IPC: G06F11/16 ,  G06F11/20

    CPC classification number: G06F11/1666 ,  G06F11/20 ,  G06F11/2007 ,  G06F11/2017 ,  G06F2201/85

    Abstract: A memory system is connectable to another apparatus via a data crossbar and stores data. During a degraded operation of data crossbars in a dual configuration, a system controller reads out data from a first memory and a second memory. Even when the data read out from one of the memories has an uncorrectable error, if the data read out from the other memory has no error or has a correctable error, the data is output. Accordingly, the reliability of data may be increased when the data is transferred during a degraded operation.

    THREE INTERCONNECTED RAID DISK CONTROLLER DATA PROCESSING SYSTEM ARCHITECTURE
    216.
    发明公开
    THREE INTERCONNECTED RAID DISK CONTROLLER DATA PROCESSING SYSTEM ARCHITECTURE 审中-公开
    与三种AFFILIATED RAID PANEL控件中的数据处理系统架构

    公开(公告)号：EP1311951A1

    公开(公告)日：2003-05-21

    申请号：EP01935365.5

    申请日：2001-05-11

    Applicant: Bull HN Information Systems Inc.

    Inventor： CARTEAU, Daniel

    IPC: G06F12/00

    CPC classification number: G06F11/2092 ,  G06F11/201 ,  G06F2201/85

    Abstract: A data processing system with a RAID cache disk subsystem utilizes three RAID cache disk controllers to provide increased performance along with increased reliability, especially in the event of a failure of one of the disk controllers. Disk writes are mirrored in two disk controllers in order to guarantee integrity in the event of a disk controller or interface failure. Typically this write caching must be terminated when one of the controllers fails in order to maintain integrity. In the present invention, write caching continues utilizing the two remaining disk controllers.

    Storage subsystem and storage controller
    217.
    发明公开
    Storage subsystem and storage controller 有权
    Speicherungsuntersystem und Speicherungssteuerung

    公开(公告)号：EP1115064A2

    公开(公告)日：2001-07-11

    申请号：EP00112906.3

    申请日：2000-06-19

    Applicant: Hitachi, Ltd.

    Inventor： Nakayama, Shinichi, Hitachi, Ltd. Intel.Prop.Group ,  Yokohata, Shizuo, Hitachi, Ltd. Intel.Prop.Group

    IPC: G06F13/38

    CPC classification number: G06F11/2092 ,  G06F3/0607 ,  G06F3/061 ,  G06F3/0614 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0661 ,  G06F3/0683 ,  G06F3/0689 ,  G06F11/2005 ,  G06F11/2007 ,  G06F13/385 ,  G06F15/16 ,  G06F2201/85 ,  Y10S707/99932 ,  Y10S707/99937 ,  Y10S707/99938

    Abstract: A storage subsystem and a storage controller adapted to take advantage of high data transfer rates of fibre channels while offering enhanced reliability and availability and capable of connecting with a plurality of host computers having multiple different interfaces. A loop is provided to serve as a common loop channel having fibre channel interfaces. Host interface controllers (HIFC) connected to host computers having different interfaces permit conversion between the fibre channel interface and a different interface as needed. Control processors, shared by the host interface controllers, each reference FCAL (fibre channel arbitrated loop) management information to capture a frame having an address of the processor in question from among the frames passing through the loop. I/O processing is then carried out by the controller in accordance with a range of logical unit numbers (LUN) set in the captured frame.

    Abstract translation: 存储子系统和存储控制器，其适于利用光纤通道的高数据传输速率，同时提供增强的可靠性和可用性并且能够与具有多个不同接口的多个主机连接。 提供了一个环路，用作具有光纤通道接口的公共环路。 连接到具有不同接口的主机的主机接口控制器（HIFC）允许根据需要在光纤通道接口和不同接口之间进行转换。 由主机接口控制器共享的控制处理器，每个参考FCAL（光纤通道仲裁环路）管理信息，以捕获通过循环的帧中具有所讨论的处理器的地址的帧。 控制器根据捕获的帧中设置的逻辑单元号（LUN）的范围来执行I / O处理。

    DATA STORAGE APPARATUS
    218.
    发明授权
    DATA STORAGE APPARATUS 失效
    数据存储设备

    公开(公告)号：EP0843851B1

    公开(公告)日：2001-05-16

    申请号：EP96925880.5

    申请日：1996-07-30

    Applicant: LSI Logic Corporation

    Inventor： DULAC, Keith, Bernard ,  PHILLIPS, Grover, George

    IPC: G06F11/00 ,  H04N7/173

    CPC classification number: G06F11/201 ,  G06F11/1076 ,  G06F2201/85 ,  G06F2211/1014 ,  H04N7/17336

    Abstract: An apparatus includes a first bus, a second bus, and a storage module having a first and second output with the first output being connected to the first bus and a second output being connected to the second bus. A first buffer storage and a second buffer storage in which the first buffer storage is connected to the first bus and the second buffer storage is connected to the second bus. The second buffer storage includes an error correction module. First and second network adapters are connected to the first and second buses respectively. The first network adapter also includes a connection to the first buffer. A processor in the apparatus includes a first processor circuitry for transferring the data using a first path through the first output in the storage module to the first buffer storage and from the first buffer storage to the first network adapter. A second processor circuitry is for transferring data using a second path through the second output to the second buffer storage through the error correction module and from the second buffer storage to the second network adapter, wherein the second processor circuitry is responsive to an error in the storage module.

    External storage system with redundant storage controllers
    220.
    发明公开
    External storage system with redundant storage controllers 失效
    外部Speichersystem mit重复Speichersteuerungen

    公开(公告)号：EP0747822A3

    公开(公告)日：1997-04-09

    申请号：EP96109061.0

    申请日：1996-06-05

    Applicant: HITACHI, LTD.

    Inventor： Matsumoto, Yoshiko ,  Muraoka, Kenji

    IPC: G06F11/20

    CPC classification number: G06F11/2092 ,  G06F3/0601 ,  G06F11/1008 ,  G06F11/3433 ,  G06F2003/0697 ,  G06F2201/85

    Abstract: An external storage system has a storage unit (500) for storing data and a plurality of storage controllers (200, 400) for controlling data transfer between an upper level system (100) and the storage unit. Each storage controller has a data buffer (240, 440) for temporarily storing data and a controller (250, 450) for controlling the operation of the storage controller. The external storage system has a management memory (310) for storing management information of the plurality of storage controllers each of which accesses this memory to monitor the operation states of other storage controllers. The external storage system has a first storage controller for processing an input-output request from the upper level system and a second storage controller for standing by for backup for a failed storage controller. In accordance with load distribution information stored in the management memory, the process to be executed by the first storage controller is partially executed by the second storage controller to improve the performance of the whole external storage system.

    Abstract translation: 外部存储系统具有用于存储数据的存储单元（500）和用于控制上级系统（100）和存储单元之间的数据传输的多个存储控制器（200,400）。 每个存储控制器具有用于临时存储数据的数据缓冲器（240,440）和用于控制存储控制器的操作的控制器（250,450）。 外部存储系统具有用于存储多个存储控制器的管理信息的管理存储器（310），每个存储控制器访问该存储器以监视其他存储控制器的操作状态。 外部存储系统具有用于处理来自上级系统的输入输出请求的第一存储控制器和用于备用故障存储控制器的第二存储控制器。 根据存储在管理存储器中的负载分布信息，由第二存储控制器部分地执行由第一存储控制器执行的处理，以提高整个外部存储系统的性能。

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