公开(公告)号：US06204596B1

公开(公告)日：2001-03-20

申请号：US09107392

申请日：1998-06-30

Applicant: John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

Inventor： John M. Macaulay ,  Peter C. Searson ,  Robert M. Duboc, Jr. ,  Christopher J. Spindt

IPC: H01J102

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319 ,  Y10T428/2973 ,  Y10T428/298

Abstract: An electron-emitting device contains a lower conductive region (22), a porous insulating layer (24A, 24B, 24D, 24E, or 24F) overlying the lower conductive region, and a multiplicity of electron-emissive elements (30, 30A, or 30B) situated in pores (281) extending through the porous layer. The pores are situated at locations substantially random relative to one another. The lower conductive region typically contains a highly conductive portion (22A) and an overlying highly resistive portion (22B). Alternatively or additionally, a patterned gate layer (34B, 40B, or 46B) overlies the porous layer. Openings (36, 42, or 541) corresponding to the filaments extend through the gate layer at locations generally centered on the filaments such that the filaments are separated from the gate layer.

Abstract translation: 电子发射器件包含覆盖在下导电区域上的下导电区域（22），多孔绝缘层（24A，24B，24D，24E或24F）和多个电子发射元件（30,30A或 30B）位于延伸穿过多孔层的孔（281）中。 孔位于相对于彼此基本上随机的位置。 下导电区域通常包含高导电部分（22A）和覆盖的高电阻部分（22B）。 或者或另外，图案化的栅极层（34B，40B或46B）覆盖在多孔层上。 对应于长丝的开口（36,42或541）在通常以灯丝为中心的位置处延伸穿过栅极层，使得灯丝与栅极层分离。

公开(公告)号：US06186850B1

公开(公告)日：2001-02-13

申请号：US09461917

申请日：1999-12-15

Applicant: David A. Cathey, Jr. ,  John Lee

Inventor： David A. Cathey, Jr. ,  John Lee

IPC: H01J902

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.

Abstract translation: 提供了一种制造具有改善的结漏电特性的场发射显示（FED）的方法。 该方法包括在FED的阴极发光显示屏和形成在FED的底板上的半导体结之间形成遮光元件。 光阻挡元件保护接点免受在显示屏上形成的光和在环境中产生的光的撞击。 因此，结的电气特性保持恒定，并且提高结漏电。 遮光元件可以形成为不透明的光吸收或光反射层。 此外，遮光元件可以被图案化以保护基板的预定区域并且可以提供诸如互连层的其它电路功能。

公开(公告)号：US6144145A

公开(公告)日：2000-11-07

申请号：US73340

申请日：1998-05-06

Applicant: Gary W. Jones ,  Steven M. Zimmerman

Inventor： Gary W. Jones ,  Steven M. Zimmerman

IPC: H01J1/304 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/30446 ,  H01J2201/319

Abstract: A high performance novel electron emitter material for use in field emission devices is disclosed. The high performance electron emitter material of the invention may comprise a high Cr and SiO mixture. This material may be formed into high aspect ratio, low work function tips which maintain their shape, thus minimizing flash over risks and electron scattering problems, while at the same time permitting a high level of fabrication process flexibility, and minimizing film stresses. One or more impurities which are conductive oxides or will form conductive oxides may be added to the Cr--SiO composition so that a net low work function emitter may be maintained under oxidation. A class of semi-conductive and conductive metal oxides comprises another embodiment of the invention. These materials include oxides of Cr, Mo, Ni, Fe, and Sc, which have current emitting properties desirable for applications where improved electron emission infirmity is desired among emitters within a pixel. Emission from these more resistive emitter tip materials may be optionally enhanced with the addition of low work function impurities such as alkali metals enabling more stable devices while still permitting low turn-on voltages. Methods of making the emitter are also disclosed.

Abstract translation: 公开了一种用于场致发射器件的高性能新型电子发射体材料。 本发明的高性能电子发射体材料可以包括高Cr和SiO混合物。 该材料可以形成为高纵横比，低功函数尖端，保持其形状，从而使风险和电子散射问题的闪现最小化，同时允许高水平的制造工艺灵活性，并最小化薄膜应力。 可以将一种或多种作为导电氧化物或将形成导电氧化物的杂质添加到Cr-SiO组合物中，使得可以在净氧化下保持净低功函数发射极。 一类半导体和导电金属氧化物包括本发明的另一个实施方案。 这些材料包括Cr，Mo，Ni，Fe和Sc的氧化物，其对于在像素内的发射体中期望改善的电子发射弱化的应用具有期望的电流发射特性。 可以通过添加低功函杂质例如碱金属来增加这些更电阻的发射极尖端材料的发射，从而使得能够实现更稳定的器件同时仍然允许低导通电压。 还公开了制造发射极的方法。

公开(公告)号：US6060841A

公开(公告)日：2000-05-09

申请号：US093089

申请日：1998-06-08

Applicant: Takahiro Niiyama ,  Shigeo Itoh

Inventor： Takahiro Niiyama ,  Shigeo Itoh

IPC: H01J1/304 ,  G09G3/10

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: A field emission element that can prevent one cathode electrode line from being completely disabled due to a short circuit between an emitter electrode and a gate electrode. One cathode electrode line consists of a stripe cathode conductor and plural island electrodes arranged on the one side of the cathode conductor. The gate electrode is disposed on the insulating layer overlaying the upper surface of each island electrode. The first resistance layer and the second resistance layer each having a different resistance value are laminated in a current control resistance layer. When excessive current flows through the emitter cone, the laminated thick-film portion is destroyed so that only the island electrode connected to the emitter cone is electrically separated off from the cathode conductor. One second resistance layer is locally laminated on the first resistance layer and for each of plural island electrodes.

Abstract translation: 能够防止一根阴极电极线由于发射电极和栅电极之间的短路而被完全禁用的场发射元件。 一个阴极电极线由条形阴极导体和布置在阴极导体一侧的多个岛电极组成。 栅电极设置在覆盖每个岛电极的上表面的绝缘层上。 各自具有不同电阻值的第一电阻层和第二电阻层层叠在电流控制电阻层中。 当过大的电流流过发射极锥体时，层压的厚膜部分被破坏，使得只有连接到发射极锥形的岛电极与阴极导体电分离。 在第一电阻层和多个岛电极中的每一个上局部层叠一个第二电阻层。

公开(公告)号：US6040613A

公开(公告)日：2000-03-21

申请号：US588738

申请日：1996-01-19

Applicant: Everett A. McTeer ,  Russell C. Zahorik ,  Scott G. Meikle

Inventor： Everett A. McTeer ,  Russell C. Zahorik ,  Scott G. Meikle

IPC: H01J9/02 ,  G09F9/30 ,  H01J1/52 ,  H01J29/04 ,  H01J29/89 ,  H01J29/96 ,  H01J31/12 ,  H01L21/027 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/52 ,  H01L23/532 ,  H01L31/0216 ,  H01L31/0232

CPC classification number: H01L21/76849 ,  H01J1/52 ,  H01J29/896 ,  H01J31/127 ,  H01L21/0276 ,  H01L21/32139 ,  H01L21/7685 ,  H01L21/76858 ,  H01L21/76885 ,  H01L23/53223 ,  H01L31/02161 ,  H01J2201/30403 ,  H01J2201/319 ,  H01L2221/1078 ,  H01L2924/0002

Abstract: Titanium aluminum nitrogen ("Ti--Al--N") is deposited onto a semiconductor substrate area to serve as an antireflective coating. For wiring line fabrication processes, the Ti--Al--N layer serves as a cap layer which prevents unwanted reflection of photolithography light (i.e., photons) during fabrication. For field emission display devices (FEDs), the Ti--Al--N layer prevents light originating at the display screen anode from penetrating transistor junctions that would hinder device operation. For the wiring line embodiment an aluminum conductive layer and a titanium-aluminum underlayer are formed beneath the antireflective cap layer. The Ti--Al underlayer reduces the shrinkage which occurs in the aluminum conductive layer during heat treatment.

Abstract translation: 将钛铝氮（“Ti-Al-N”）沉积到半导体衬底区域上以用作抗反射涂层。 对于布线生产工艺，Ti-Al-N层用作遮盖层，防止在制造过程中光刻光（即光子）的不期望的反射。 对于场致发射显示装置（FED），Ti-Al-N层防止在显示屏阳极处产生的光穿透将阻碍器件工作的晶体管结。 对于布线实施例，在抗反射盖层下方形成铝导电层和钛 - 铝底层。 Ti-Al底层减少了在热处理期间在铝导电层中发生的收缩。

公开(公告)号：US6020683A

公开(公告)日：2000-02-01

申请号：US190737

申请日：1998-11-12

Applicant: David A. Cathey, Jr. ,  John Lee

Inventor： David A. Cathey, Jr. ,  John Lee

IPC: G09F9/30 ,  H01J9/02 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/12 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.

公开(公告)号：US5929827A

公开(公告)日：1999-07-27

申请号：US330669

申请日：1994-10-28

Applicant: Aoji Isono ,  Yoshiyuki Osada ,  Hidetoshi Suzuki ,  Eiji Yamaguchi ,  Toshihiko Takeda ,  Hiroaki Toshima ,  Noritake Suzuki ,  Yasuyuki Todokoro

Inventor： Aoji Isono ,  Yoshiyuki Osada ,  Hidetoshi Suzuki ,  Eiji Yamaguchi ,  Toshihiko Takeda ,  Hiroaki Toshima ,  Noritake Suzuki ,  Yasuyuki Todokoro

IPC: G09G3/22 ,  H01J1/316 ,  H01J9/02 ,  H01J31/12

CPC classification number: B82Y10/00 ,  G09G3/22 ,  H01J1/316 ,  H01J31/127 ,  H01J9/027 ,  G09G2300/0885 ,  G09G2310/06 ,  H01J2201/3165 ,  H01J2201/319

Abstract: This invention relates to an electron source and an image forming apparatus each of which particularly comprises a surface conduction type electron emitting element as an electron emitting element, a method of manufacturing an electron source and an image forming apparatus, in which the energization forming treatment step of the surface conduction type electron emitting element is performed by applying a voltage to an electron emitting portion formation thin film via a nonlinear element connected in series with the thin film and having nonlinear voltage/current characteristics, an electron source and an image forming apparatus in each of which the nonlinear element is connected in series with the surface conduction type electron emitting element, and a method of driving the same.

Abstract translation: 本发明涉及一种电子源和图像形成装置，其特别包括作为电子发射元件的表面传导型电子发射元件，制造电子源的方法和图像形成装置，其中激励形成处理步骤 的表面传导型电子发射元件是通过经由与薄膜串联连接并具有非线性电压/电流特性的非线性元件向电子发射部分形成薄膜施加电压，电子源和图像形成装置 其中每个非线性元件与表面传导型电子发射元件串联连接，以及驱动该方法。

公开(公告)号：US5900301A

公开(公告)日：1999-05-04

申请号：US779145

申请日：1997-01-03

Applicant: George E. Brandes ,  Jonathan C. Twichell ,  Michael W. Geis ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Christopher J. Curtin

Inventor： George E. Brandes ,  Jonathan C. Twichell ,  Michael W. Geis ,  John M. Macaulay ,  Robert M. Duboc, Jr. ,  Christopher J. Curtin

IPC: H01J1/304 ,  H01J9/02 ,  B05D5/12

CPC classification number: H01J1/3042 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319 ,  Y10T428/24124 ,  Y10T428/24198

Abstract: Fabrication of an electron-emitting device entails distributing electron-emissive carbon-containing particles (22) over a non-insulating region (12). The particles can be made electron emissive after the particle distributing step. Particle bonding material (24) is typically provided to bond the particles to the non-insulating region. The particle bonding material can include carbide formed by heating or/and can be created by modifying a layer (32) provided between the non-insulating region and the particles. In one embodiment, the particles emit electrons primarily from graphite or/and amorphous carbon regions. In another embodiment, the particles are made electron-emissive prior to the particle distributing step.

Abstract translation: 电子发射器件的制造需要在非绝缘区域（12）上分布电子发射含碳颗粒（22）。 在颗粒分布步骤之后，颗粒可以被制成电子发射。 通常提供颗粒粘合材料（24）以将颗粒结合到非绝缘区域。 粒子接合材料可以包括通过加热形成的碳化物和/或可以通过改变设置在非绝缘区域和颗粒之间的层（32）而形成的碳化物。 在一个实施方案中，颗粒主要从石墨或/和无定形碳区域发射电子。 在另一个实施方案中，颗粒在颗粒分布步骤之前被制成电子发射的。

公开(公告)号：US5856812A

公开(公告)日：1999-01-05

申请号：US637353

申请日：1996-04-24

Applicant: Glen E. Hush ,  Tyler A. Lowrey

Inventor： Glen E. Hush ,  Tyler A. Lowrey

IPC: G09G3/20 ,  G09G3/22 ,  H01J31/12

CPC classification number: G09G3/22 ,  H01J31/127 ,  G09G2300/08 ,  G09G2310/0248 ,  G09G2310/0259 ,  G09G2310/066 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G3/2011 ,  G09G3/2014 ,  H01J2201/319 ,  H01J2329/00

Abstract: A flat panel display, such as a Field Emission Display ("FED"), is disclosed having a current control circuit. Input into the display, initially, is an analog signal having an amplitude. In one embodiment, the current control circuit includes a converter for converting the analog input signal to a sawtooth signal having a height and width. Then, the level of the sawtooth signal is compared to a voltage level to establish a pulse width of an emitter current. The emitter current is thus controlled by a pulse width modulation approach. In another embodiment, the current control circuit traps a column voltage on a parasitic capacitance. The trapped voltage then controls the gate of a transistor to control current flow from the emitter set to ground.

公开(公告)号：US5837331A

公开(公告)日：1998-11-17

申请号：US614703

申请日：1996-03-13

Applicant: Eric P. Menu ,  John Song ,  Bernard F. Coll

Inventor： Eric P. Menu ,  John Song ,  Bernard F. Coll

IPC: C23C14/06 ,  C23C14/54 ,  C23C16/34 ,  H01J1/30 ,  H01J1/304 ,  H01J3/02 ,  H01J9/02 ,  H05H1/24 ,  B05D1/36 ,  B05D5/12 ,  C23C16/00

CPC classification number: C23C16/342 ,  C23C14/0605 ,  C23C14/548 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30457 ,  H01J2201/319

Abstract: An amorphous multi-layered structure (100, 200) is formed by a method including the steps of: i) positioning a deposition substrate (101) in a physical vapor deposition apparatus (300, 400, 500) ii) ionizing a precursor of a multi-phase material within the physical vapor deposition apparatus (300, 400, 500) iv) modulating the total ion impinging energy of the ions to deposit layers having predetermined properties corresponding to the total ion impinging energy values.

Abstract translation: 通过包括以下步骤的方法形成非晶多层结构（100,200）：i）将沉积基板（101）定位在物理气相沉积设备（300,400,500）中，ii）将 物理气相沉积装置（300,400,500）内的多相材料iv）调节离子的总离子冲击能量以沉积具有对应于总离子冲击能量值的预定特性的层。