公开(公告)号：US20230258866A1

公开(公告)日：2023-08-17

申请号：US18152435

申请日：2023-01-10

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Houssein El Dirani

IPC: G02B6/136 ,  G02B6/132

CPC classification number: G02B6/136 ,  G02B6/132 ,  G02B2006/12061

Abstract: In accordance with an embodiment, a method for manufacturing a semiconductor device includes forming a first front layer and a first rear layer of a first material respectively on a front main face and a rear main face of a semiconductor substrate wafer; forming a first plurality of trenches and a second plurality of trenches respectively in a surface of the first front layer and in a surface of the first rear layer; forming a second front layer of a second material on the first front layer, where the second front layer extends over the first front layer, in the first plurality of trenches, and between the first plurality of trenches on the surface of the first front layer; and forming a second rear layer of the second material on the surface of the first rear layer, wherein the second rear layer extends over the first rear layer, in the second plurality of trenches, and between the second plurality of trenches on the surface of the first rear layer.

公开(公告)号：US20230074527A1

公开(公告)日：2023-03-09

申请号：US17988141

申请日：2022-11-16

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sebastien Cremer

IPC: G02F1/1333 ,  G02B6/13 ,  G02F1/01

Abstract: A method includes forming a layer made of a first insulating material on a first layer made of a second insulating material that covers a support, defining a waveguide made of the first material in the layer of the first material, covering the waveguide made of the first material with a second layer of the second material, planarizing an upper surface of the second layer of the second material, and forming a single-crystal silicon layer over the second layer.

公开(公告)号：US20230068198A1

公开(公告)日：2023-03-02

申请号：US17890113

申请日：2022-08-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Simon Guillaumet ,  Benjamin Vianne ,  Stephane Zoll

IPC: G02B5/02

Abstract: The present description concerns an optical diffuser including a first layer having an electrically-conductive track formed therein, and a second layer, having the first layer resting thereon resting thereon, and having at least two electrically-conductive pillars extending across the entire thickness of the second layer formed therein. The second layer includes at least one first region located under the conductive track comprising no pillar.

公开(公告)号：US11581449B2

公开(公告)日：2023-02-14

申请号：US16703689

申请日：2019-12-04

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Younes Benhammou ,  Dominique Golanski ,  Denis Rideau

IPC: H01L31/107 ,  H01L31/028 ,  H01L31/0745 ,  H01L31/18

Abstract: The present disclosure relates to a photodiode comprising a first part made of silicon and a second part made of doped germanium lying on and in contact with the first part, the first part comprising a stack of a first area and of a second area forming a p-n junction and the doping level of the germanium increasing as the distance from the p-n junction increases.

公开(公告)号：US20220406829A1

公开(公告)日：2022-12-22

申请号：US17840437

申请日：2022-06-14

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Maurin DOUIX

IPC: H01L27/146

Abstract: An integrated sensor includes a substrate made of a first semiconductor material having a first optical refractive index. The substrate includes a pixel array, wherein each pixel has a photosensitive active zone formed by an index contrast zone including a matrix of the first semiconductor material and a periodic structure embedded in the matrix. The periodic structure extends from the backside of the substrate and has a two-dimensional periodicity in a parallel plane with the backside. A value of the periodicity is linked with the wavelength of the optical signal and with the first refractive index. Elements of the periodic structure are formed of a second optically transparent material having a second refractive index less than the first refractive index. These elements are positioned at locations defined by the periodicity except for at one location defining a region, preferably central, that is devoid of a corresponding one of the elements.

公开(公告)号：US20220384721A1

公开(公告)日：2022-12-01

申请号：US17751190

申请日：2022-05-23

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Pascal GOURAUD ,  Laurent FAVENNEC

IPC: H01L45/00 ,  H01L27/24

Abstract: A memory cell is manufactured by: (a) forming a stack comprising a first layer made of a phase change material and a second layer made of a conductive material; (b) forming a mask on the stack covering only the memory cell location; and (c) etching portions of the stack not covered by the first mask. The formation of the mask covering only the memory cell location comprises defining a first mask extending in a row direction for each row of memory cell locations and then patterning the first mask in a column direction for each column of memory cell locations.

公开(公告)号：US20220336736A1

公开(公告)日：2022-10-20

申请号：US17856711

申请日：2022-07-01

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Philippe BOIVIN ,  Daniel BENOIT ,  Remy BERTHELON

IPC: H01L45/00 ,  H01L27/24

Abstract: The present disclosure concerns a phase-change memory manufacturing method and a phase-change memory device. The method includes forming a first insulating layer in cavities located vertically in line with strips of phase-change material, and anisotropically etching the portions of the first insulating layer located at the bottom of the cavities; and a phase-change memory device including a first insulating layer against lateral walls of cavities located vertically in line with strips of phase-change material.

公开(公告)号：US20220308190A1

公开(公告)日：2022-09-29

申请号：US17704481

申请日：2022-03-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Matteo Maria VIGNETTI ,  Pierre MALINGE

IPC: G01S7/4865

Abstract: An indirect time-of-flight (iTOF) includes a pixel with a photoconversion area, a readout circuit and at least two circuit sets. Each circuit set includes: a capacitive element connected to a first node of the circuit set; a controllable charge transfer device connected between a first electrode of the photoconversion area and the first node; and a first transistor having a gate connected to the first node, a source connected to the readout circuit and a drain configured to receive a bias potential. The capacitive element is configured to store a voltage in response to charges generated by the photoconversion area.

公开(公告)号：US20220272291A1

公开(公告)日：2022-08-25

申请号：US17667485

申请日：2022-02-08

Applicant: STMicroelectronics SA ,  STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Crolles 2) SAS

Inventor： Celine Mas ,  Matteo Maria Vignetti ,  Francois Agut

IPC: H04N5/369 ,  H04N5/378

Abstract: The present description describes an image sensor including an array of pixels arranged inside and on top of a region of a semiconductor substrate electrically insulated from the rest of the substrate by insulating trenches crossing the substrate, each pixel including a photoconversion area and at least two assemblies, each including a memory area and a transfer gate coupling the memory area to the photoconversion area, and a circuit configured to apply, for each pixel and at least during each integration phase, a bias voltage different from ground to a portion of the substrate having the pixel arranged inside and on top of it.

公开(公告)号：US11387195B2

公开(公告)日：2022-07-12

申请号：US17130683

申请日：2020-12-22

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sebastien Petitdidier

IPC: H01L23/00 ,  H01L23/48 ,  G06F21/87 ,  H01L23/522

Abstract: An electronic chip includes a substrate made of semiconductor material. Conductive pads are located on a front side of the substrate and cavities extend into the substrate from a backside of the substrate. Each cavity reaches an associated conductive pad. Protrusions are disposed on the backside of the substrate. A conductive layer covers the walls and bottoms of the cavities. The conductive layer includes portions on the backside, each portion partially located on an associated protrusion and electrically connecting two of the conductive pads.