公开(公告)号：US09580305B2

公开(公告)日：2017-02-28

申请号：US15237300

申请日：2016-08-15

Applicant: Xiang Zheng Tu

Inventor： Xiang Zheng Tu

IPC: G01N25/18 ,  B81C1/00 ,  G01N27/18

CPC classification number: B81C1/0069 ,  B81B2201/0214 ,  B81C2201/0115 ,  G01N27/18

Abstract: A single silicon wafer micromachined thermal conduction sensor is described. The sensor consists of a heat transfer cavity with a flat bottom and an arbitrary plane shape, which is created in a silicon substrate. A heated resistor with a temperature dependence resistance is deposed on a thin film bridge, which is the top of the cavity. A heat sink is the flat bottom of the cavity and parallel to the bridge completely. The heat transfer from the heated resistor to the heat sink is modulated by the change of the thermal conductivity of the gas or gas mixture filled in the cavity. This change can be measured to determine the composition concentration of the gas mixture or the pressure of the air in a vacuum system.

Abstract translation: 描述了单个硅晶片微加工热传导传感器。 传感器由在硅衬底中产生的具有平坦底部和任意平面形状的传热腔组成。 具有温度依赖性电阻的加热电阻器被放置在薄膜桥上，该薄膜桥是空腔的顶部。 散热器是空腔的平坦底部，并且完全平行于桥。 从加热的电阻器到散热器的热传递通过填充在空腔中的气体或气体混合物的热导率的变化来调节。 可以测量该变化以确定气体混合物的组成浓度或真空系统中空气的压力。

公开(公告)号：US09440847B2

公开(公告)日：2016-09-13

申请号：US14045555

申请日：2013-10-03

Applicant: Xiang Zheng Tu

Inventor： Xiang Zheng Tu

IPC: G01N25/18 ,  B81C1/00 ,  G01N27/18

CPC classification number: B81C1/0069 ,  B81B2201/0214 ,  B81C2201/0115 ,  G01N27/18

Abstract: A single silicon wafer micromachined thermal conduction sensor is described. The sensor consists of a heat transfer cavity with a flat bottom and an arbitrary plane shape, which is created in a silicon substrate. A heated resistor with a temperature dependence resistance is deposed on a thin film bridge, which is the top of the cavity. A heat sink is the flat bottom of the cavity and parallel to the bridge completely. The heat transfer from the heated resistor to the heat sink is modulated by the change of the thermal conductivity of the gas or gas mixture filled in the cavity. This change can be measured to determine the composition concentration of the gas mixture or the pressure of the air in a vacuum system.

Abstract translation: 描述了单个硅晶片微加工热传导传感器。 传感器由在硅衬底中产生的具有平坦底部和任意平面形状的传热腔组成。 具有温度依赖性电阻的加热电阻器被放置在薄膜桥上，该薄膜桥是空腔的顶部。 散热器是空腔的平坦底部，并且完全平行于桥。 从加热的电阻器到散热器的热传递通过填充在空腔中的气体或气体混合物的热导率的变化来调节。 可以测量该变化以确定气体混合物的组成浓度或真空系统中空气的压力。

公开(公告)号：US20160052782A1

公开(公告)日：2016-02-25

申请号：US14932814

申请日：2015-11-04

Applicant: XINTEC INC.

Inventor： Chien-Hung LIU

IPC: B81C1/00

CPC classification number: B81C1/00325 ,  B81B2207/092 ,  B81B2207/097 ,  B81C1/00301 ,  B81C2201/0115 ,  B81C2203/0118 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/93 ,  H01L2221/68304 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2221/68386 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/11009 ,  H01L2224/11019 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/29007 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/93 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15788 ,  H01L2224/0231 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2924/00

Abstract: The invention provides an electronic device package and fabrication method thereof. The electronic device package includes a sensor chip. An upper surface of the sensor chip comprises a sensing film. A covering plate having an opening structure covers the upper surface of the sensor chip. A cavity is between the covering plate and the sensor chip, corresponding to a position of the sensing film, where the cavity communicates with the opening structure. A spacer is between the covering plate and the sensor chip, surrounding the cavity. A pressure releasing region is between the spacer and the sensing film.

Abstract translation: 本发明提供一种电子器件封装及其制造方法。 电子装置封装包括传感器芯片。 传感器芯片的上表面包括感测膜。 具有开口结构的覆盖板覆盖传感器芯片的上表面。 覆盖板和传感器芯片之间的腔体对应于感测膜的位置，其中空腔与开口结构连通。 间隔件位于覆盖板和传感器芯片之间，围绕腔体。 压力释放区域位于间隔件和感测膜之间。

公开(公告)号：US09181084B2

公开(公告)日：2015-11-10

申请号：US12652715

申请日：2010-01-05

Applicant: Chien-Hung Liu

Inventor： Chien-Hung Liu

IPC: H01L23/02 ,  B81C1/00 ,  H01L21/683 ,  H01L23/00

CPC classification number: B81C1/00325 ,  B81B2207/092 ,  B81B2207/097 ,  B81C1/00301 ,  B81C2201/0115 ,  B81C2203/0118 ,  H01L21/6835 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/93 ,  H01L2221/68304 ,  H01L2221/68331 ,  H01L2221/6834 ,  H01L2221/68372 ,  H01L2221/68377 ,  H01L2221/68386 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/11009 ,  H01L2224/11019 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/29007 ,  H01L2224/29011 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83191 ,  H01L2224/8385 ,  H01L2224/93 ,  H01L2924/0001 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01075 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15151 ,  H01L2924/15788 ,  H01L2224/0231 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2924/00

Abstract: The invention provides an electronic device package and fabrication method thereof. The electronic device package includes a sensor chip. An upper surface of the sensor chip comprises a sensing film. A covering plate having an opening structure covers the upper surface of the sensor chip. A cavity is between the covering plate and the sensor chip, corresponding to a position of the sensing film, where the cavity communicates with the opening structure. A spacer is between the covering plate and the sensor chip, surrounding the cavity. A pressure releasing region is between the spacer and the sensing film.

Abstract translation: 本发明提供一种电子器件封装及其制造方法。 电子装置封装包括传感器芯片。 传感器芯片的上表面包括感测膜。 具有开口结构的覆盖板覆盖传感器芯片的上表面。 覆盖板和传感器芯片之间的腔体对应于感测膜的位置，其中空腔与开口结构连通。 间隔件位于覆盖板和传感器芯片之间，围绕腔体。 压力释放区域位于间隔件和感测膜之间。

公开(公告)号：US09096427B2

公开(公告)日：2015-08-04

申请号：US14286175

申请日：2014-05-23

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Sofiane Ben Mbarek ,  Sophie Giroud ,  Frederic-Xavier Gaillard

IPC: H01L21/00 ,  B81C1/00

CPC classification number: B81C1/00531 ,  B81B2203/0118 ,  B81C1/0015 ,  B81C1/00539 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/014 ,  B81C2201/019 ,  B81C2203/036

Abstract: Method for making at least one first suspended part of a microelectronic or nanoelectronic structure from a monolithic part of a first substrate, the method comprising the following steps: make a first etching with a first given depth in the monolithic substrate to define the suspended part, deposit a protective layer on at least the side edges of the first etching, make a second etching with a second depth in the first etching, make a physicochemical treatment of at least part of the zone located under the suspended structure so as to modify it, and release the suspended part by removal of the physicochemically treated part.

Abstract translation: 用于从第一衬底的整体部分制造微电子或纳米电子结构的至少一个第一悬浮部分的方法，所述方法包括以下步骤：在所述整体式衬底中进行第一给定深度的第一蚀刻以限定所述悬浮部分， 在第一蚀刻的至少侧边缘上沉积保护层，在第一蚀刻中进行具有第二深度的第二蚀刻，对位于悬挂结构下方的区域的至少一部分进行物理化学处理，以进行改性， 并通过去除物理化学处理的部分释放悬浮的部分。

公开(公告)号：US08940616B2

公开(公告)日：2015-01-27

申请号：US13559626

申请日：2012-07-27

Applicant: Rama Krishna Kotlanka ,  Rakesh Kumar ,  Premachandran Chirayarikathuveedu Sankarapillai ,  Huamao Lin ,  Pradeep Yelehanka

Inventor： Rama Krishna Kotlanka ,  Rakesh Kumar ,  Premachandran Chirayarikathuveedu Sankarapillai ,  Huamao Lin ,  Pradeep Yelehanka

IPC: H01L21/30 ,  H01L21/46 ,  H01L21/76 ,  H01L21/00

CPC classification number: B81B7/0006 ,  B81C1/00269 ,  B81C3/001 ,  B81C2201/0115 ,  H01L21/50 ,  H01L23/481 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A bonded device having at least one porosified surface is disclosed. The porosification process introduces nanoporous holes into the microstructure of the bonding surfaces of the devices. The material property of a porosified material is softer as compared to a non-porosified material. For the same bonding conditions, the use of the porosified bonding surfaces enhances the bond strength of the bonded interface as compared to the non-porosified material.

Abstract translation: 公开了具有至少一个孔隙化表面的粘合装置。 孔化过程将纳米多孔孔引入装置的结合表面的微结构中。 与非孔隙化材料相比，孔化材料的材料性质更软。 对于相同的接合条件，与非孔隙化材料相比，使用孔隙化粘合表面增强了粘结界面的粘结强度。

公开(公告)号：US20140357006A1

公开(公告)日：2014-12-04

申请号：US14286175

申请日：2014-05-23

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Sofiane BEN MBAREK ,  Sophie Giroud ,  Frederic-Xavier Gaillard

IPC: B81C1/00

CPC classification number: B81C1/00531 ,  B81B2203/0118 ,  B81C1/0015 ,  B81C1/00539 ,  B81C2201/0114 ,  B81C2201/0115 ,  B81C2201/014 ,  B81C2201/019 ,  B81C2203/036

Abstract: Method for making at least one first suspended part of a microelectronic or nanoelectronic structure from a monolithic part of a first substrate, the method comprising the following steps: make a first etching with a first given depth in the monolithic substrate to define the suspended part, deposit a protective layer on at least the side edges of the first etching, make a second etching with a second depth in the first etching, make a physicochemical treatment of at least part of the zone located under the suspended structure so as to modify it, and release the suspended part by removal of the physicochemically treated part.

Abstract translation: 用于从第一衬底的整体部分制造微电子或纳米电子结构的至少一个第一悬浮部分的方法，所述方法包括以下步骤：在所述整体式衬底中进行第一给定深度的第一蚀刻以限定所述悬浮部分， 在第一蚀刻的至少侧边缘上沉积保护层，在第一蚀刻中进行具有第二深度的第二蚀刻，对位于悬挂结构下方的区域的至少一部分进行物理化学处理，以进行改性， 并通过去除物理化学处理的部分释放悬浮的部分。

公开(公告)号：US08377315B2

公开(公告)日：2013-02-19

申请号：US12810973

申请日：2008-11-19

Applicant: Dick Scholten ,  Tjalf Pirk ,  Michael Stumber ,  Franz Laermer ,  Ralf Reichenbach ,  Ando Feyh

Inventor： Dick Scholten ,  Tjalf Pirk ,  Michael Stumber ,  Franz Laermer ,  Ralf Reichenbach ,  Ando Feyh

IPC: C23F1/00

CPC classification number: A61K9/0019 ,  A61B5/02755 ,  A61K9/0024 ,  A61K9/2009 ,  A61K31/337 ,  A61M37/0015 ,  A61M2037/0023 ,  A61M2037/0053 ,  B81B2201/055 ,  B81C1/00126 ,  B81C2201/0115 ,  Y10T428/249978

Abstract: A method for manufacturing porous microstructures in a silicon semiconductor substrate, porous microstructures manufactured according to this method, and the use thereof.

Abstract translation: 一种用于制造硅半导体衬底中的多孔微结构的方法，根据该方法制造的多孔微结构及其用途。

公开(公告)号：US08354033B2

公开(公告)日：2013-01-15

申请号：US12227509

申请日：2007-04-27

Applicant: Dick Scholten ,  Julia Cassemeyer ,  Michael Stumber ,  Franz Laermer ,  Ando Feyh ,  Christian Maeurer

Inventor： Dick Scholten ,  Julia Cassemeyer ,  Michael Stumber ,  Franz Laermer ,  Ando Feyh ,  Christian Maeurer

IPC: B44C1/22 ,  C25F3/00

CPC classification number: B81C1/00119 ,  A61M37/0015 ,  A61M2037/003 ,  A61M2037/0038 ,  A61M2037/0046 ,  A61M2037/0053 ,  B81C2201/0112 ,  B81C2201/0115

Abstract: A method for producing porous microneedles (10) situated in an array on a silicon substrate includes: providing a silicon substrate, applying a first etching mask, patterning microneedles using a DRIE process (“deep reactive ion etching”), removing the first etching mask, at least partially porosifying the Si substrate, the porosification beginning on the front side of the Si substrate and a porous reservoir being formed.

Abstract translation: 一种制造位于硅衬底上的多孔微针（10）的方法，包括：提供硅衬底，施加第一蚀刻掩模，使用DRIE工艺（深反应离子蚀刻）图案化微针，去除第一蚀刻掩模， 至少部分地使Si衬底开孔，从Si衬底的正面开始的开孔化和形成的多孔容器。

公开(公告)号：US20110281102A1

公开(公告)日：2011-11-17

申请号：US12810973

申请日：2008-11-19

Applicant: Dick Scholten ,  Tjalf Pirk ,  Michael Stumber ,  Franz Laermer ,  Ralf Reichenbach ,  Ando Feyh

Inventor： Dick Scholten ,  Tjalf Pirk ,  Michael Stumber ,  Franz Laermer ,  Ralf Reichenbach ,  Ando Feyh

IPC: B32B3/26 ,  C23F1/04

CPC classification number: A61K9/0019 ,  A61B5/02755 ,  A61K9/0024 ,  A61K9/2009 ,  A61K31/337 ,  A61M37/0015 ,  A61M2037/0023 ,  A61M2037/0053 ,  B81B2201/055 ,  B81C1/00126 ,  B81C2201/0115 ,  Y10T428/249978

Abstract: A method for manufacturing porous microstructures in a silicon semiconductor substrate, porous microstructures manufactured according to this method, and the use thereof.

Abstract translation: 一种用于制造硅半导体衬底中的多孔微结构的方法，根据该方法制造的多孔微结构及其用途。