Electrical contact
    22.
    发明申请
    Electrical contact 审中-公开
    电接触

    公开(公告)号:US20050191906A1

    公开(公告)日:2005-09-01

    申请号:US11076779

    申请日:2005-03-10

    Applicant: Che-Yu Li

    Inventor: Che-Yu Li

    Abstract: An electrical contact formed from a plurality of interlaced and annealed wires by weaving or braiding the wires together to form a mesh, annealing the mesh, and cutting the annealed mesh so as to form a plurality of individual electrical contacts. A method for forming a precursor material for use in manufacturing an electrical contact is also provided that includes manipulating a plurality of wires so as to interlace the wires into a unitary structure. The unitary structure is then annealed. An electrical contact may then be formed from the precursor material by elastically rolling a portion of the unitary structure so as to form a tube, annealing the tube, and then cutting the unitary structure so as to release the tube thereby to form an electrical contact. An electrical contact may also be formed by folding a portion of the unitary structure so as to form one or more pleats, annealing the pleated unitary structure, and then cutting the pleated unitary structure so as to release one or more electrical contacts. The precursor material may also be formed by photo-etching a sheet of conductive material so as to form a mesh, and then annealing the mesh. A connector system may be formed including a housing defining a plurality of openings that are each filled with an electrical contact comprising a plurality of interlaced and annealed wires that have been previously either rolled or pleated.

    Abstract translation: 通过将电线编织或编织在一起以形成网格,退火网格和切割退火的网格以形成多个单独的电触点,由多个交织和退火的线形成的电接触。 还提供了一种用于形成用于制造电触点的前体材料的方法,其包括操作多条导线以将导线交织成单一结构。 然后将整体结构退火。 然后可以通过弹性地滚动一体结构的一部分来形成电子接触,从而形成管,退火管,然后切割整体结构,从而释放管,从而形成电接触。 还可以通过折叠一体结构的一部分以形成一个或多个褶皱,退绕折叠的整体结构,然后切割褶皱的整体结构以便释放一个或多个电触点,来形成电接触。 前体材料也可以通过光刻蚀导电材料片以形成网格,然后对网格进行退火而形成。 可以形成连接器系统,其包括限定多个开口的壳体,每个开口填充有包括先前已经被卷起或打褶的多个隔行和退火的电线的电接触。

    Precision cutter for elastomeric cable
    24.
    发明授权
    Precision cutter for elastomeric cable 有权
    弹性电缆用精密切割机

    公开(公告)号:US06742426B2

    公开(公告)日:2004-06-01

    申请号:US09872321

    申请日:2001-06-01

    Abstract: A method for cutting an elastomer cable into ultra-precise, defect-free segments of consistent length, and an apparatus to perform the same. The invented apparatus comprises cable advancement, cable clamping and cable shearing systems. The cable advancement system comprises rollers with a groove substantially matching the diameter of the cable. The cable clamping system comprises a pair of dies with a preferably conical feed hole and a clamping hole substantially matching the diameter of the cable. The cable shearing system comprises a preferably extra keen coated cryo treated movable razor blade that is held at an adjustable angle against the face of the clamping dies and slides in a linear path at a low sawing angle. In one embodiment, a second razor blade for nicking the cable prior to shearing—on substantially the opposite side of the cable from where shearing begins—is used to prevent tears in cable slices. The invented apparatus can be manually operated, or it can be motorized.

    Abstract translation: 一种用于将弹性体电缆切割成具有一致长度的超精细,无缺陷段的方法以及执行该弹性体电缆的装置。 本发明的装置包括电缆前进,电缆夹紧和电缆剪切系统。 电缆推进系统包括具有基本上与电缆直径相匹配的凹槽的滚子。 电缆夹紧系统包括具有优选锥形进给孔的一对模具和基本上匹配电缆直径的夹紧孔。 电缆剪切系统包括优选地额外的热敏涂层冷冻处理的可动剃刀刀片,其以相对于夹紧模具的表面保持可调节的角度并以低锯切角度在线性路径中滑动。 在一个实施例中,用于在剪切之前切割电缆的第二剃刀刀片在电缆的基本上相对于剪切开始的相反侧,用于防止电缆切片中的撕裂。 本发明的装置可以手动操作,也可以是机动的。

    Stackable memory module with variable bandwidth
    25.
    发明授权
    Stackable memory module with variable bandwidth 有权
    可变带宽的可堆叠内存模块

    公开(公告)号:US06705877B1

    公开(公告)日:2004-03-16

    申请号:US10345450

    申请日:2003-01-17

    CPC classification number: H05K1/144 H01R12/52 H01R12/716

    Abstract: The present invention is a family of memory modules. In one embodiment a memory module with granularity and upgradeability of bandwidth, and a low profile uses 256 MB SDRAM or DDR SDRAM memory devices in chip scale packages (CSPs) to support a memory data bus width of up to at least 512 bits. Each module includes an impedance-controlled substrate having contact pads, memory devices, and other components on its surfaces. In one embodiment, the inclusion of spaced apart multiple area array interconnections allows a row of memory devices to be symmetrically mounted on each side of each of the area array interconnections, thereby reducing the interconnect lengths and facilitating matching of interconnect lengths. Short area array interconnections, including ball grid array (BGA) and land grid array (LGA) options, provide electrical communication between modules and the rest of the system. Thermal control structures may be included to maintain reliable operating temperatures.

    Abstract translation: 本发明是一系列存储器模块。 在一个实施例中,具有粒度和带宽可升级性的存储器模块以及低配置度使用芯片级封装(CSP)中的256MB SDRAM或DDR SDRAM存储器件来支持高达至少512位的存储器数据总线宽度。 每个模块包括具有接触垫,存储器件和其表面上的其它部件的阻抗控制的衬底。 在一个实施例中,包括间隔开的多区域阵列互连允许一行存储器件对称地安装在每个区域阵列互连的每一侧上,从而减少互连长度并促进互连长度的匹配。 短距阵列互连,包括球栅阵列(BGA)和陆格栅阵列(LGA)选项,可提供模块与系统其余部分之间的电气通信。 可以包括热控制结构以保持可靠的工作温度。

    Contact assembly for land grid array interposer or electrical connector

    公开(公告)号:US06659778B2

    公开(公告)日:2003-12-09

    申请号:US10210300

    申请日:2002-08-01

    Applicant: Che-Yu Li

    Inventor: Che-Yu Li

    Abstract: The present invention provides an electrical contact comprising a first member having spring properties and a second member wrapped around at least a portion of the first member wherein the second member has a greater electrical conductivity than the first member. In one embodiment, a conductor is wrapped around at least a portion of a spring. In another embodiment, the spring is formed into a coil or helix with a wire wrapped around at least a portion of the helical spring. In one form of this embodiment, the spring has a plurality of turns and the wire is wrapped around at least two of the turns. In another form of this embodiment, the spring has a plurality of turns and the wire is wrapped around all of the turns. An interposer connector is also provided having a frame including a top surface and a bottom surface and a plurality of apertures arranged in a pattern and opening onto the top and bottom surfaces of the frame. A plurality of springs are provided with each spring having a conductor wrapped around at least a portion of the spring where the conductor has a greater electrical conductivity than the spring. One of the springs is positioned within each of the apertures so that at least a portion of each of the conductors is exposed above the top and bottom surfaces of the frame.

    Method of constructing and sealing tiled, flat-panel displays
    27.
    发明授权
    Method of constructing and sealing tiled, flat-panel displays 失效
    平铺平板显示器的构造和密封方法

    公开(公告)号:US06639643B2

    公开(公告)日:2003-10-28

    申请号:US09136693

    申请日:1998-08-19

    CPC classification number: G02F1/1339 G02F1/13336 G09F9/3026

    Abstract: The present invention features methods and apparatuses for sealing tiled, flat-panel displays (FPDs). Tile edges corresponding with the display's perimeter edges are designed with a wide seal. Interior edges, however, have narrow seals in order to maintain the desired, constant, pixel pitch across tile boundaries. In some cases, this invention applies specifically to arrays of tiles 2×2 or less, and, in other cases, to N×M arrays, where N and M are any integer numbers. The tiles are enclosed with top and bottom glass plates, which are sealed with an adhesive bond to the tiles on the outside perimeter of the tiled display. Vertical seams (where tiles meet at the perimeter of the FPD) are sealed with a small amount of polymer. The seal may be constructed between a cover plate and a back plate, sandwiching the tiles. The AMLCD edges may be coated with either a non-permeable material or a polymer having an extremely low permeability (for example, Parylene™). Alternatively, the edge sealing of individual tiles can be achieved by using a metallized film adhesive that is bonded to the tile edges. A low-temperature, sintered Solgel can be used to achieve extremely narrow, yet mechanically strong, seals for individual tiles. Still another enhancement employs a metallurgical seal outside a narrow, polymer seal.

    Abstract translation: 本发明的特征在于用于密封平铺平板显示器(FPD)的方法和装置。 对应于显示器周边边缘的平铺边缘设计有广泛的密封。 然而,内部边缘具有窄的密封,以便在瓦片边界上保持所需的恒定的像素间距。 在某些情况下,本发明特别适用于2×2以下的瓦片阵列,在其他情况下,适用于N×M阵列,其中N和M是任何整数。 瓷砖用顶部和底部玻璃板封闭,玻璃板通过粘合剂粘结在瓷砖显示器的外周边上的瓷砖上。 垂直接缝(其中瓷砖在FPD周边相遇)用少量聚合物密封。 密封件可以构造在盖板和背板之间,夹住瓦片。 AMLCD边缘可以涂覆有非渗透性材料或具有极低渗透性的聚合物(例如,Parylene TM)。 或者,各个瓦片的边缘密封可以通过使用结合到瓦片边缘的金属化膜粘合剂来实现。 低温烧结的Solgel可用于为单个瓷砖获得极窄但机械强度的密封。 另一个改进是在窄的聚合物密封之外采用冶金密封。

    Short channel, memory module with stacked printed circuit boards
    28.
    发明授权
    Short channel, memory module with stacked printed circuit boards 有权
    短通道,内存模块与堆叠印刷电路板

    公开(公告)号:US06597062B1

    公开(公告)日:2003-07-22

    申请号:US10212016

    申请日:2002-08-05

    Abstract: The present invention is a family of memory modules. In one embodiment a memory module with granularity, upgradeability, and high throughput of at least 4.2 gigabytes per second using two channels of RAMBUS memory devices in a typical volume of just 2.2 inches by 1.1 inches by 0.39 inch. Each module includes an impedance-controlled substrate having contact pads, memory devices and other components, including optional driver line terminators, on its surfaces. The inclusion of spaced, multiple area array interconnections allows a row of memory devices to be serially mounted between each of the area array interconnections, thereby minimizing the interconnect lengths and facilitating matching of interconnect lengths. Short area array interconnections, including BGA, PGA, and LGA options or interchangeable alternative connectors provide interconnections between the modules and the rest of the system. Thermal control structures may be included to maintain the memory devices within a reliable range of operating temperatures.

    Abstract translation: 本发明是一系列存储器模块。 在一个实施例中,具有至少4.2吉字节/秒的粒度,可升级性和高吞吐量的存储器模块,其使用在2.2英寸×1.1英寸×0.39英寸的典型体积中的两个通道的RAMBUS存储器件。 每个模块包括其表面上具有接触焊盘,存储器件和其它部件(包括可选的驱动器线路终端器)的阻抗控制的衬底。 包含间隔开的多区域阵列互连允许一行存储器件串联地安装在每个区域阵列互连之间,从而最小化互连长度并促进互连长度的匹配。 短范围阵列互连,包括BGA,PGA和LGA选项或可互换替代连接器,可提供模块与系统其余部分之间的互连。 可以包括热控制结构以将存储器件保持在可靠的操作温度范围内。

    Compact stacked electronic package
    29.
    发明授权

    公开(公告)号:US06590159B2

    公开(公告)日:2003-07-08

    申请号:US09775991

    申请日:2001-02-05

    CPC classification number: H05K7/1061 H05K7/023

    Abstract: The present invention provides an electronic package for high speed, high performance semiconductors. It includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Suitable applications requiring high speed, impedance-controlled transmission line buses throughout the entire package include microprocessor and digital signal processor data buses, and high speed memory buses for products such as laptop and handheld computing and telecommunications devices. Circuit members include printed circuit boards and circuit modules, and may be formed from a wide variety of materials with unpacked or packed semiconductors attached directly to the circuit members. Through the use of clamps the package is at least factory reworkable and can be field separable. Thermal management structures may be included to maintain the high density devices within a reliable range of operating temperatures.

    High capacity memory module with high electrical design margins
    30.
    发明授权
    High capacity memory module with high electrical design margins 有权
    高容量内存模块,具有高电气设计余量

    公开(公告)号:US06496380B1

    公开(公告)日:2002-12-17

    申请号:US09645859

    申请日:2000-08-24

    Abstract: The present invention features a memory module for use in conjunction with high speed, impedance-controlled buses. Each memory card may be a conventional printed circuit card with memory chips attached directly thereto. Alternately, high density memory modules assembled from pluggable sub-modules may be used. These sub-modules may be temporarily assembled for testing and/or burn-in. Bus terminations mounted directly on the memory card or the memory module eliminate the need for bus exit connections, allowing the freed-up connection capacity to be used to address additional memory capacity on the module. An innovative pin-in-hole contact system is used both to connect sub-modules to the memory module and, optionally, to connect the memory module to a motherboard or similar structure. A thermal control structure may be placed in the memory module, cooling the increased number of memory chips to prevent excess heat build-up and ensure reliable memory operation.

    Abstract translation: 本发明的特征在于与高速,阻抗控制的总线一起使用的存储器模块。 每个存储卡可以是具有与其直接连接的存储芯片的常规印刷电路卡。 或者,可以使用由可插拔子模块组装的高密度存储器模块。 这些子模块可以临时组装用于测试和/或老化。 直接安装在存储卡或存储器模块上的总线终端消除了对总线出口连接的需要,允许释放连接容量来解决模块上的额外存储容量。 创新的针孔接触系统用于将子模块连接到存储器模块,并且可选地将存储器模块连接到主板或类似结构。 可以将热控制结构放置在存储器模块中,冷却更多数量的存储器芯片以防止过多的热量积聚并确保可靠的存储器操作。

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