公开(公告)号：US09312214B2

公开(公告)日：2016-04-12

申请号：US13240629

申请日：2011-09-22

Applicant: Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Wen-Hsiung Lu ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/498 ,  H01L21/60 ,  H01L21/50 ,  H01L21/56 ,  H01L21/48 ,  H01L21/683 ,  H01L23/00

CPC classification number: H01L23/49816 ,  H01L21/486 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/49827 ,  H01L23/49894 ,  H01L24/16 ,  H01L2221/68345 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/83005 ,  H01L2924/12042 ,  H01L2924/15331 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method includes applying a polymer-comprising material over a carrier, and forming a via over the carrier. The via is located inside the polymer-comprising material, and substantially penetrates through the polymer-comprising material. A first redistribution line is formed on a first side of the polymer-comprising material. A second redistribution line is formed on a second side of the polymer-comprising material opposite to the first side. The first redistribution line is electrically coupled to the second redistribution line through the via.

Abstract translation: 一种方法包括在载体上涂覆含聚合物的材料，并在载体上形成通孔。 通孔位于含聚合物的材料的内部，并且基本上穿透包含聚合物的材料。 在包含聚合物的材料的第一面上形成第一再分配线。 第二再分配线形成在与第一侧相对的含聚合物材料的第二侧上。 第一再分配线通过通孔电耦合到第二再分配线。

公开(公告)号：US08809117B2

公开(公告)日：2014-08-19

申请号：US13270890

申请日：2011-10-11

Applicant: Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

Inventor： Wen-Hsiung Lu ,  Ming-Da Cheng ,  Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Chung-Shi Liu

IPC: H01L21/00

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

Abstract: Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.

Abstract translation: 公开了用于半导体器件的封装处理工具和封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括包括框架的机械结构。 框架包括适于将多个集成电路管芯保持在其中的多个孔。 框架包括至少一个中空区域。

公开(公告)号：US20130143361A1

公开(公告)日：2013-06-06

申请号：US13309311

申请日：2011-12-01

Applicant: Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Wei-Hung Lin ,  Kuei-Wei Huang ,  Chih-Wei Lin ,  Chun-Cheng Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L21/60 ,  H01L23/12

CPC classification number: H01L21/6835 ,  H01L21/561 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/75 ,  H01L24/81 ,  H01L24/83 ,  H01L24/97 ,  H01L2221/68372 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05554 ,  H01L2224/05572 ,  H01L2224/05599 ,  H01L2224/11444 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/14135 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/75754 ,  H01L2224/7698 ,  H01L2224/81001 ,  H01L2224/81136 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81907 ,  H01L2224/83102 ,  H01L2224/9205 ,  H01L2224/92125 ,  H01L2224/95001 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/3841 ,  Y10T29/41 ,  H01L2924/00 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2224/05552 ,  H01L2924/013

Abstract: Packaging process tools and systems, and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure for supporting package substrates or integrated circuit die during a packaging process for the integrated circuit die. The mechanical structure includes a low thermal conductivity material disposed thereon.

Abstract translation: 公开了用于半导体器件的封装加工工具和系统以及封装方法。 在一个实施例中，用于半导体器件的封装处理工具包括用于在集成电路管芯的封装工艺期间支撑封装衬底或集成电路管芯的机械结构。 机械结构包括设置在其上的低热导率材料。

公开(公告)号：US20130099385A1

公开(公告)日：2013-04-25

申请号：US13280157

申请日：2011-10-24

Applicant: Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

Inventor： Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Hsiu-Jen Lin ,  Ming-Da Cheng ,  Chung-Shi Liu

IPC: H01L23/538 ,  H01L21/66

CPC classification number: H01L25/50 ,  H01L21/31105 ,  H01L21/565 ,  H01L22/12 ,  H01L22/20 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/562 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/1131 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16113 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81447 ,  H01L2224/81801 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/1431 ,  H01L2924/1432 ,  H01L2924/1434 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A device includes a package component having conductive features on a top surface, and a polymer region molded over the top surface of the first package component. A plurality of openings extends from a top surface of the polymer region into the polymer region, wherein each of the conductive features is exposed through one of the plurality of openings. The plurality of openings includes a first opening having a first horizontal size, and a second opening having a second horizontal size different from the first horizontal size.

公开(公告)号：US20130099370A1

公开(公告)日：2013-04-25

申请号：US13277575

申请日：2011-10-20

Applicant: Ming-Da CHENG ,  Chih-Wei LIN ,  Kuei-Wei HUANG ,  Yu-Peng TSAI ,  Chun-Cheng LIN ,  Chung-Shi LIU

Inventor： Ming-Da CHENG ,  Chih-Wei LIN ,  Kuei-Wei HUANG ,  Yu-Peng TSAI ,  Chun-Cheng LIN ,  Chung-Shi LIU

IPC: H01L23/498 ,  H01L21/60

CPC classification number: H01L24/16 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/05572 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/13005 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/1601 ,  H01L2224/16104 ,  H01L2224/16238 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/206 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The distance between the conductive pillar and the conductive trace is less than or equal to about 16 μm.

Abstract translation: 半导体封装包括具有导电迹线的工件和具有导电柱的芯片。 芯片附着在工件上，并且在导电柱和导电迹线之间形成焊点区域。 导电柱和导电迹线之间的距离小于或等于约16μm。

公开(公告)号：US20130062761A1

公开(公告)日：2013-03-14

申请号：US13228768

申请日：2011-09-09

Applicant: Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

Inventor： Chih-Wei Lin ,  Ming-Da Cheng ,  Wen-Hsiung Lu ,  Hsiu-Jen Lin ,  Bor-Ping Jang ,  Chung-Shi Liu ,  Mirng-Ji Lii ,  Chen-Hua Yu ,  Meng-Tse Chen ,  Chun-Cheng Lin ,  Yu-Peng Tsai ,  Kuei-Wei Huang ,  Wei-Hung Lin

IPC: H01L23/498 ,  H01L21/56

CPC classification number: H01L25/0657 ,  H01L21/52 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/09 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L25/03 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2221/68345 ,  H01L2221/68377 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/06515 ,  H01L2224/09181 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16225 ,  H01L2224/16238 ,  H01L2224/73259 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81815 ,  H01L2224/9202 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15322 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2224/81 ,  H01L2224/03 ,  H01L2924/014 ,  H01L2924/00

Abstract: Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.

公开(公告)号：US08378364B2

公开(公告)日：2013-02-19

申请号：US12700102

申请日：2010-02-04

Applicant: Ke-Hao Pan ,  Chun-Cheng Lin

Inventor： Ke-Hao Pan ,  Chun-Cheng Lin

IPC: H01L33/00

CPC classification number: H01L25/0753 ,  H01L2924/0002 ,  H01L2933/0091 ,  H01L2924/00

Abstract: Multi-chip light emitting diodes and method for fabricating the same are provided. The multi-chip light emitting diode includes a lead frame including a carrier part. A plurality of chips is disposed on the carrier part, wherein the plurality of chips includes a first chip and a second chip. A first scattering layer is conformally covering the first chip to expose electrodes thereof, wherein the first scattering layer consists of a first scattering material. A second scattering layer is conformally covering the second chip to expose electrodes thereof, wherein the second scattering layer consists of a second scattering material.

Abstract translation: 提供了多芯片发光二极管及其制造方法。 多芯片发光二极管包括具有载体部分的引线框架。 多个芯片设置在载体部分上，其中多个芯片包括第一芯片和第二芯片。 第一散射层保形地覆盖第一芯片以暴露其电极，其中第一散射层由第一散射材料组成。 第二散射层保形地覆盖第二芯片以暴露其电极，其中第二散射层由第二散射材料组成。

公开(公告)号：US20120269243A1

公开(公告)日：2012-10-25

申请号：US13090272

申请日：2011-04-20

Applicant: Chun-Cheng Lin ,  Ming-Shih Yu

Inventor： Chun-Cheng Lin ,  Ming-Shih Yu

IPC: H04B17/00

CPC classification number: H04L7/033 ,  H03L7/0807 ,  H03L7/0891 ,  H03L7/091

Abstract: A phase detector includes a first sampling unit, a sampling module and a phase determining module. The first sampling unit is arranged for sampling a first data input signal to generate a first data signal according to a first clock signal. The sampling module includes a second sampling unit and a third sampling unit. The second sampling unit is arranged for sampling a second data input signal to generate a second data signal according to a second clock signal. The third sampling unit is arranged for sampling the second data signal to generate a third data signal according to the first clock signal. The phase determining module is arranged for generating a phase detecting result according to the first data signal and the third data signal.

Abstract translation: 相位检测器包括第一采样单元，采样模块和相位确定模块。 第一采样单元被布置用于对第一数据输入信号进行采样，以根据第一时钟信号产生第一数据信号。 采样模块包括第二采样单元和第三采样单元。 第二采样单元被布置用于对第二数据输入信号进行采样以根据第二时钟信号产生第二数据信号。 第三采样单元被布置用于对第二数据信号进行采样以根据第一时钟信号产生第三数据信号。 相位确定模块被布置成根据第一数据信号和第三数据信号产生相位检测结果。

公开(公告)号：US08153387B2

公开(公告)日：2012-04-10

申请号：US12490953

申请日：2009-06-24

Applicant: Chun-Cheng Lin ,  Mu-Lin Chen ,  Po-Chiao Lin ,  Yu-Ju Chen ,  Shu-Hua Chen

Inventor： Chun-Cheng Lin ,  Mu-Lin Chen ,  Po-Chiao Lin ,  Yu-Ju Chen ,  Shu-Hua Chen

IPC: G01N33/53

CPC classification number: C07K16/18 ,  C07K17/14 ,  C07K2317/41 ,  C07K2317/52 ,  G01N33/54353

Abstract: A method for immobilizing glycoprotein is disclosed. A surface is provided. Next, a boronic acid is contacted to the surface. The boronic acid is represented as Y—R—B—(OH)2 and includes a boronic acid group (B—(OH)2), a linker R, and a functional group Y, in which the boronic acid is bonded to the surface via the functional group Y. A glycoprotein is contacted to the boronic acid, wherein two spatially adjacent hydroxyl groups of a carbohydrate chain form a boronate ester with the boronic acid group of the boronic acid to immobilize the glycoprotein. The goal of site-specific and covalent protein immobilization without interfering the binding affinity of an antibody to antigen may be thus achieved with the reaction of boronic acid and the carbohydrate chain of Fc region.

Abstract translation: 公开了一种固定糖蛋白的方法。 提供一个表面。 接下来，硼酸与表面接触。 硼酸被表示为Y-R-B-（OH）2，并且包括硼酸基团（B-（OH）2），连接体R和官能团Y，其中硼酸键合到 通过官能团Y表面。糖蛋白与硼酸接触，其中碳水化合物链的两个空间上相邻的羟基与硼酸的硼酸基团形成硼酸酯以固定糖蛋白。 因此可以通过硼酸和Fc区的碳水化合物链的反应来实现位点特异性和共价蛋白固定而不干扰抗体对抗原的结合亲和力的目标。

公开(公告)号：US20100190966A1

公开(公告)日：2010-07-29

申请号：US12490953

申请日：2009-06-24

Applicant: Chun-Cheng LIN ,  Mu-Lin CHEN ,  Po-Chiao LIN ,  Yu-Ju CHEN ,  Shu-Hua CHEN

Inventor： Chun-Cheng LIN ,  Mu-Lin CHEN ,  Po-Chiao LIN ,  Yu-Ju CHEN ,  Shu-Hua CHEN

IPC: C07K16/00 ,  C07K2/00

CPC classification number: C07K16/18 ,  C07K17/14 ,  C07K2317/41 ,  C07K2317/52 ,  G01N33/54353

Abstract: A method for immobilizing glycoprotein is disclosed. A surface is provided. Next, a boronic acid is contacted to the surface. The boronic acid is represented as Y—R—B—(OH)2 and includes a boronic acid group(B—(OH)2), a linker R, and a functional group Y, in which the boronic acid is bonded to the surface via the functional group Y. A glycoprotein is contacted to the boronic acid, wherein two spatially adjacent hydroxyl groups of a carbohydrate chain form a boronate ester with the boronic acid group of the boronic acid to immobilize the glycoprotein. The goal of site-specific and covalent protein immobilization without interfering the binding affinity of an antibody to antigen may be thus achieved with the reaction of boronic acid and the carbohydrate chain of Fc region.

Abstract translation: 公开了一种固定糖蛋白的方法。 提供一个表面。 接下来，硼酸与表面接触。 硼酸被表示为Y-R-B-（OH）2，并且包括硼酸基团（B-（OH）2），连接体R和官能团Y，其中硼酸键合到 通过官能团Y表面。糖蛋白与硼酸接触，其中碳水化合物链的两个空间上相邻的羟基与硼酸的硼酸基团形成硼酸酯以固定糖蛋白。 因此可以通过硼酸和Fc区的碳水化合物链的反应来实现位点特异性和共价蛋白固定而不干扰抗体对抗原的结合亲和力的目标。