公开(公告)号：EP2278865A1

公开(公告)日：2011-01-26

申请号：EP10011152.5

申请日：2000-10-11

Applicant: Tessera Interconnect Materials, Inc.

Inventor： Tomo, Ijima ,  Masayuji, Ohsawa

IPC: H05K3/40 ,  H05K3/46 ,  H05K3/06

CPC classification number: H05K3/4647 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2224/81192 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2924/3025 ,  H05K3/06 ,  H05K3/062 ,  H05K3/3457 ,  H05K3/4038 ,  H05K3/4614 ,  H05K3/4652 ,  H05K2201/0355 ,  H05K2201/09563 ,  H05K2203/0369 ,  H05K2203/0384 ,  H05K2203/041 ,  H05K2203/0733 ,  H05K2203/1189 ,  H05K2203/1476 ,  Y10T29/49126 ,  Y10T29/49137 ,  Y10T29/49155 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: The invention relates to a wiring circuit substrate, comprising: a single layer base member in which are formed:
a first metal layer (51) in which conductor circuit traces are formed, and etched metal protrusions (53) that are electrically connected to said first metal layer; and a second metal layer (54) that is formed on top surfaces of said protrusions, wherein said second metal layer is formed of a solder-plated layer or a solder layer.

Abstract translation: 本发明涉及一种布线电路基板，包括：形成有单层基底构件;形成有导体电路迹线的第一金属层（51）和蚀刻金属突起（53），其电连接到所述第一 金属层; 以及形成在所述突起的顶表面上的第二金属层（54），其中所述第二金属层由焊料镀层或焊料层形成。