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公开(公告)号:KR1020080094897A
公开(公告)日:2008-10-27
申请号:KR1020087017870
申请日:2006-12-20
Applicant: 고쿠리츠다이가쿠호진 도호쿠다이가쿠 , 고에키자이단호진 고쿠사이카가쿠 신고우자이단
IPC: H01L21/8238 , H01L29/786
CPC classification number: H01L27/1211 , H01L21/823807 , H01L21/823821 , H01L21/823878 , H01L29/045 , H01L29/785 , H01L2029/7857 , H01L27/0924
Abstract: In order to make the rise operation time identical to the fall operation speed in a CMOS circuit, it is necessary that the p-type MOS transistor have an area different from that of the n-type MOS transistor because of the difference in carrier moving degree. This area difference prevents improvement of integrality of the semiconductor device. The NMOS transistor and the PMOS transistor are 3-dimensionally configured with a channel region on both of the (100) plane and the (110) plane and the channel region and the gate insulation film of the both transistors having identical area. Thus, it is possible to make the areas of the gate insulation film or the like identical to each other and the gate capacity identical. Furthermore, the integrality on the substrate can be doubled as compared to the conventional technique.
Abstract translation: 为了使上升操作时间与CMOS电路中的下降操作速度相同,由于载波移动度的差异,p型MOS晶体管的面积与n型MOS晶体管的面积不同 。 该区域差异防止了半导体器件的完整性的提高。 所述NMOS晶体管和所述PMOS晶体管在(100)面和(110)面都具有通道区域三维构造,并且所述两个晶体管的沟道区域和栅极绝缘膜具有相同的面积。 因此,可以使栅极绝缘膜等的面积相同,栅极容量相同。 此外,与常规技术相比,衬底上的完整性可以加倍。
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公开(公告)号:KR1020070101268A
公开(公告)日:2007-10-16
申请号:KR1020077015590
申请日:2006-01-20
Applicant: 고쿠리츠다이가쿠호진 도호쿠다이가쿠
IPC: H01L29/78 , H01L21/318
CPC classification number: H01L21/28202 , H01L21/3144 , H01L21/3185 , H01L29/518 , Y10T428/265 , H01L21/02332
Abstract: A dielectric film wherein N in the state of an Si3=N bonding is present in a concentration of 3 atomic % or more in the surface side of an oxide film and also is present in a concentration of 0. 1 atomic % or less in the interface side of the oxide film can achieve the prevention of the B diffusion and also the prevention of the deterioration of the NBTI resistance in combination. When the Ar/N 2 radical nitridation is used, it is difficult for the resultant oxide film to satisfy the condition wherein N in the above bonding state is present in a concentration of 3 atomic % or more in the surface side of an oxide film and simultaneously is present in a concentration of 0.1 atomic % or less in the interface side of the oxide film, whereas, the above distribution of the N concentration can be achieved by using any of the gas combinations of Xe/N2, Kr/N2, Ar/NH 3, Xe/NH3, Kr/NH3, Ar/N2/H 2, Xe/N2/H2and Kr/N2/H2.
Abstract translation: 在氧化膜的表面侧以3原子%以上的浓度存在Si 3 = N键的状态下的N的电介质膜,并且其浓度为0.1原子%以下 氧化膜的界面侧可以实现B扩散的防止,也可以防止NBTI电阻的组合劣化。 当使用Ar / N 2自由基氮化时,所得到的氧化物膜难以满足在氧化物膜的表面侧以上述结合状态的N以3原子%以上的浓度存在的条件, 在氧化膜的界面侧同时以0.1原子%以下的浓度存在,而N浓度的上述分布可以通过使用Xe / N 2,Kr / N 2,Ar / NH 3,Xe / NH 3,Kr / NH 3,Ar / N 2 / H 2,Xe / N 2 / H 2和Kr / N 2 / H 2。
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