公开(公告)号：KR100661296B1

公开(公告)日：2006-12-26

申请号：KR1020050083048

申请日：2005-09-07

Applicant: 삼성전기주식회사

Inventor： 김문일 ,  유제광 ,  김형태 ,  이재걸 ,  이두환

IPC: H05K7/12 ,  H05K1/18

Abstract: A jig device and a method for manufacturing a PCB having an embedded electronic component are provided to reduce an aligning time of the PCB by aligning the PCB on a stiffener board. A jig device, which supports a PCB(Printed Circuit Board) having a cavity for an electronic component, includes a stiffener board(240) and a remover plate(140). At least two first holes are formed on the stiffener board. The PCB and the electronic component are attached to the stiffener board. The remover plate has a pin, which is inserted into the first hole and formed on at least one corresponding position of the first holes. The first hole has a shape, which is selected from the group consisting of circular, oval, and polygonal shapes.

Abstract translation: 提供夹具装置和用于制造具有嵌入式电子部件的PCB的方法，以通过将PCB对准在加强板上来减少PCB的对准时间。 支撑具有用于电子部件的空腔的PCB（印刷电路板）的夹具装置包括加强板（240）和移除板（140）。 在加强板上至少形成两个第一孔。 PCB和电子元件连接在加强板上。 去除器板具有销，该销插入到第一孔中并形成在第一孔的至少一个对应位置上。 第一孔具有从由圆形，椭圆形和多边形组成的组中选择的形状。

公开(公告)号：KR100993317B1

公开(公告)日：2010-11-09

申请号：KR1020080083164

申请日：2008-08-26

Applicant: 삼성전기주식회사

Inventor： 김형태 ,  전영로 ,  이옥주

IPC: H01L33/58 ,  G02B3/00

CPC classification number: H01L33/52 ,  B29C35/02 ,  B29C35/08 ,  B29C2791/001 ,  B29K2105/0002 ,  B29K2105/243 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: 본 발명은 발광 다이오드 패키지의 렌즈 제조방법에 관한 것으로서, 액상 수지를 다단계로 경화시켜 최종적인 렌즈 형상을 자유롭게 구현함으로써, 재료의 손실을 줄여 제작 단가를 낮추고, 추가적인 장비 투자가 필요 없으며 단순한 공정을 통해 생산성을 향상시킬 수 있는 효과가 있다.
이를 위한 본 발명에 의한 발광 다이오드 패키지의 렌즈 제조방법은, 발광칩이 실장된 기판을 준비하는 단계와, 상기 기판 상에 상기 발광칩을 덮는 가경화 수지를 형성하는 단계, 및 상기 가경화 수지를 렌즈 형상으로 경화시키는 단계를 포함할 수 있다.
LED, 렌즈, 가경화

公开(公告)号：KR1020080013540A

公开(公告)日：2008-02-13

申请号：KR1020060075199

申请日：2006-08-09

Applicant: 삼성전기주식회사

Inventor： 김형태 ,  전영로 ,  임종오 ,  최원영 ,  김주덕

IPC: B29C45/18 ,  B29C45/30 ,  B29C45/32

Abstract: An apparatus for balancing the filling of injection molds is provided to feed resin to cavities without temperature difference by forming one runner under the other runner. An apparatus for balancing the filling of injection molds comprises a first runner(21) and a plurality of second runners(22a,22b). The second runners are branched from the first runner. The second runners are piled like a step with respect to each other. Through the structure, temperature difference between resins fed to each cavity is reduced.

Abstract translation: 提供了一种用于平衡注射模具的填充的装置，通过在另一个流道下形成一个流道，将树脂馈送到没有温度差的空腔。 用于平衡注射模具的填充的装置包括第一流道（21）和多个第二流道（22a，22b）。 第二名赛跑者从第一名跑步者分支。 第二个赛跑者相对于彼此堆叠一步。 通过该结构，减少了供给到每个空腔的树脂之间的温差。

公开(公告)号：KR1020070101183A

公开(公告)日：2007-10-16

申请号：KR1020070069529

申请日：2007-07-11

Applicant: 삼성전기주식회사

Inventor： 이두환 ,  김문일 ,  이재걸 ,  구자부 ,  김관규 ,  김형태 ,  윤일성

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/181 ,  H05K1/142 ,  H05K1/144 ,  H05K1/185 ,  H05K3/303

Abstract: An electronic component embedded PCB and a method for manufacturing the same are provided to improve productivity by minimizing the use of a different sort of material due to a symmetric structure of the PCB. An electronic component embedded PCB includes a core substrate(10), a through hole(12), an electronic component(20), a first insulation layer(30), a second insulation layer(32), and a circuit pattern(34). The through hole(12) is punctured on the substrate(10). The electronic component(20) is embedded in the through hole(12), and has a thickness corresponding to the thickness of the core substrate(10). The first insulation layer(30) is stacked on a plane of the core substrate(10). The second insulation layer(32) is stacked on the other plane of the core substrate(10), and has the thickness corresponding to the thickness of the first insulation layer(30). The circuit pattern(34) is formed on a surface of the first insulation layer(30) and the second insulation layer(32).

Abstract translation: 提供电子部件嵌入式PCB及其制造方法，以通过最小化由于PCB的对称结构而使用不同种类的材料来提高生产率。 电子部件嵌入式PCB包括芯基板（10），通孔（12），电子部件（20），第一绝缘层（30），第二绝缘层（32）和电路图案（34） 。 通孔（12）在基板（10）上被刺穿。 电子部件（20）嵌入在通孔（12）中，具有与芯基板（10）的厚度对应的厚度。 第一绝缘层（30）堆叠在芯基板（10）的平面上。 第二绝缘层（32）层叠在芯基板（10）的另一平面上，具有与第一绝缘层（30）的厚度对应的厚度。 电路图案（34）形成在第一绝缘层（30）和第二绝缘层（32）的表面上。

公开(公告)号：KR100758229B1

公开(公告)日：2007-09-12

申请号：KR1020060032970

申请日：2006-04-11

Applicant: 삼성전기주식회사

Inventor： 이두환 ,  김문일 ,  이재걸 ,  구자부 ,  김관규 ,  김형태 ,  윤일성

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/185 ,  H05K3/4602 ,  H05K3/4697

Abstract: An electronic components embedded PCB(Printed Circuit Board) and a method for manufacturing the same are provided to reduce warpage by forming the PCB in a geometrically symmetrical structure. A method for manufacturing an electronic components embedded PCB includes the steps of: forming a through hole by partially perforating a core substrate in correspondence to the size of the electronic component(100); attaching a tape at one surface of the core substrate(110); attaching the electronic component at the surface of the tape to be received inside the through hole(120); laminating a first insulating layer at the other surface of the core substrate(130); and removing the tape and laminating a second insulating layer with the thickness corresponding to the thickness of the first insulating layer at one surface of the core substrate(150).

Abstract translation: 提供电子部件嵌入式PCB（印刷电路板）及其制造方法，以通过在几何对称的结构中形成PCB来减少翘曲。 一种电子部件嵌入式PCB的制造方法，其特征在于，包括以下步骤：对应于所述电子部件（100）的尺寸对芯基板进行部分穿孔而形成贯通孔。 在所述芯基板（110）的一个表面附接带; 将电子部件安装在待接纳在通孔（120）内的带的表面上; 在所述芯基板（130）的另一个表面层叠第一绝缘层; 并且在所述芯基板（150）的一个表面处移除所述带并层压具有对应于所述第一绝缘层的厚度的厚度的第二绝缘层。

公开(公告)号：KR1020060134512A

公开(公告)日：2006-12-28

申请号：KR1020050054247

申请日：2005-06-23

Applicant: 삼성전기주식회사

Inventor： 김문일 ,  유제광 ,  류창섭 ,  김형태 ,  이요석 ,  이두환

IPC: H05K3/46

CPC classification number: H05K3/4697 ,  H05K1/185 ,  H05K3/0044 ,  H05K3/022 ,  H05K3/26 ,  H05K3/32

Abstract: A method for fabricating an embedded printed circuit board is provided to reduce process time without restriction on post-process by reducing error rate. In a method for fabricating an embedded printed circuit board, a hole is formed on a copper clad laminate where a circuit pattern is formed(S10). The copper clad laminate and a prepreg and a copper foil are sequentially located and pre-attached(S20). An electric device is fixed in the hole(S30). The inside of the hole is filled and then hardened(S40). A prepreg and a copper foil are additionally located and stacked on another plane of the copper clad laminate and then a via hole is formed(S50).

Abstract translation: 提供一种用于制造嵌入式印刷电路板的方法，以通过降低错误率来减少处理时间而不限制后处理。 在嵌入式印刷电路板的制造方法中，在形成有电路图案的覆铜层压板上形成孔（S10）。 覆铜层压板和预浸料和铜箔依次定位并预先安装（S20）。 电气设备固定在孔中（S30）。 孔的内部被填充然后硬化（S40）。 预浸料和铜箔另外定位并堆叠在覆铜层压板的另一平面上，然后形成通孔（S50）。