Abstract:
PURPOSE: A polymer mixture controls hole mobility and electron mobility and improves the efficiency and lifetime of a light emitting diode. CONSTITUTION: A polymer mixture includes a first polymer having a unit represented by chemical formula 1 and a second polymer having a unit represented by chemical formula 2. An organic light-emitting diode (100) includes a first electrode (12); a second electrode facing the first electrode; and an organic layer inserted between the first electrode and the second electrode. The organic layer includes a light emitting layer (16) which includes the polymer mixture. A method for controlling the charge mobility of the light emitting layer of an organic light-emitting diode includes a step of controlling the composition ratio of the first polymer and the second polymer of the organic light-emitting diode.
Abstract:
PURPOSE: A polymer is provided to have a wide energy band gap and high triplet energy level, and to transfer both holes and electrons. CONSTITUTION: A polymer comprises a repeating unit represented by chemical formula 1. In chemical formula 1, X1 is a single bond, -[C(R20)(R21)]a-, -Si(R22)(R23)-, -S-, or -O-; a is an integer from 1-5; each of R1-R14 is hydrogen, deuterium, halogen, hydroxy, cyano, nitro, amino, amidino, hydrazine, hydrazone, carboxy group or salts thereof, phosphorous or salts thereof, substituted or unsubstituted C1-60 alkyl, substituted or unsubstituted C2-60 alkenyl, substituted or unsubstituted C2-60 alkynyl, substituted or unsubstituted C1-60 alkoxy, substituted or unsubstituted C3-60 cycloalkyl, substituted or unsubstituted C3-60 cycloalkenyl, substituted or unsubstituted C5-60 aryl, substituted or unsubstituted C5-60 aryloxy, substituted or unsubstituted C5-60 arylthio, substituted or unsubstituted C2-60 heteroaryl, -N(Q1)(Q2), or -Si(Q3)(Q4)(Q5).
Abstract:
본 발명은 반도체장치에 있어서 특히 반도체장치의 보호막구조에 관한 것으로, 소정의 반도체 기판과, 상기 기판상에 형성된 MOS트랜지스터를 구비하는 반도체 장치에 있어서, 상기 반도체 장치의 보호막이 제1 실리콘질화막과 PSG막과 제2 실리콘질화막을 순차적으로 적층하여 보호막을 형성함으로써, 낮은 스트레스와 충분한 수분 저항력을 가짐과 동시에 수소가 기판내로 유입되는 현상을 방지하여 최적의 반도체 특성을 확보할 수 있으며 금속의 부식을 막을 수 있는 부대효과에 함께, 보호막의 스텝 커버리지(step coverage)를 향상시킬 수 있는 복합보호막을 제공한다.
Abstract:
PURPOSE: A method for forming an element isolation structure of a semiconductor device is provided to differentiate the depths of trenches by performing a patterning process twice. CONSTITUTION: A semiconductor substrate(21) is divided into a region I, a region II, and a region III. A pad oxide film(31) and a mask nitride film(32) are successively formed on the semiconductor substrate. A first photo-resist pattern(41) is formed on the mask nitride film. A hard mask pattern(33) is formed by partially eliminating the mask nitride film and the pad oxide film. The first photo-resist pattern and the hard mask pattern have openings(41A, 41B).