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公开(公告)号:KR1020150039283A
公开(公告)日:2015-04-10
申请号:KR1020130117628
申请日:2013-10-02
Applicant: 삼성전자주식회사
CPC classification number: F24C15/322 , F24C1/14 , F24C7/08 , F24C15/2014
Abstract: 본발명은조리기기에관한것으로보다상세하기는유동성이많은컨벡션유동부에메탈폼을구비하여액체상의오일미스트도분해할수 있도록마련되는조리기기를제공한다. 본발명의목적을달성하기위한일 실시예에따른조리기기는내부에조리실이형성된본체, 조리실내부의공기를가열하는컨벡션히터및 조리실내부의공기를순환시키는컨벡션팬을포함하는컨벡션유동부및 컨벡션유동부주위에설치되며, 조리실내부의공기에포함되는조리가스를포집및 분해하는메탈폼을포함한다.
Abstract translation: 本发明提供一种烹调设备,更具体地说,涉及一种烹调设备,通过在具有大的流动性的对流单元上具有金属泡沫来分解液体油雾。 为此,根据一个实施例,一种烹饪设备包括:内部形成烹饪室的主体; 包括加热烹饪室内的空气的对流加热器和使烹调室内的空气再循环的对流风扇的对流流动单元; 以及安装在对流单元周围的金属泡沫,并且收集和分解烹饪室中包括在空气中的烹饪气体。
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公开(公告)号:KR1020120078607A
公开(公告)日:2012-07-10
申请号:KR1020110141792
申请日:2011-12-23
IPC: G03F7/42 , C11D7/26 , C11D7/32 , H01L21/304
CPC classification number: G03F7/425 , G03F7/063 , G03F7/423 , H01L21/02052 , H01L21/0209 , H01L21/0274
Abstract: PURPOSE: A composition for a semiconductor device washing solution and a method for washing a semiconductor device using the same are provided to improve the productivity of a semiconductor manufacturing process by minimizing the damages of a metal wiring and an oxide film. CONSTITUTION: A composition for a semiconductor device washing solution includes 0.001 to 0.5 weight% of a fluorine-based compound, 0.1 to 10 weight% of an ammonium hydroxide-based compound substituted with an alkyl group, an aryl group, or an aralkyl group, 0.1 to 10 weight% of carboxylic acid containing nitrogen, 0.01 to 1 weight% of a water soluble polymer compound, and remaining amount of water. The carboxylic acid containing nitrogen includes one or more selected from a group including iminodiacetic acid, proline, hydroxyproline, 1-pyrroline-5-carboxylic acid, N-acetylglutamate, cilastatin, and folic acid. The fluorine-based compound includes one or more selected from a group including hydrofluoric acid(HF), ammonium fluoride(NH_4F), ammonium bifluoride(NH_4F-HF), tetramethylammonium fluoride(N(CH_3)_4F), fluoboric acid(HBF_4), and fluorobenzene(C_6H_5F).
Abstract translation: 目的:提供一种用于半导体器件清洗液的组合物和使用其的半导体器件的洗涤方法,以通过最小化金属布线和氧化膜的损伤来提高半导体制造工艺的生产率。 构成:半导体装置清洗液用组合物含有0.001〜0.5重量%的氟系化合物,0.1〜10重量%的被烷基,芳基或芳烷基取代的氢氧化铵系化合物, 0.1〜10重量%的含氮羧酸,0.01〜1重量%的水溶性高分子化合物和余量的水。 含氮的羧酸包括选自亚氨基二乙酸,脯氨酸,羟脯氨酸,1-吡咯啉-5-羧酸,N-乙酰谷氨酸,西司他丁和叶酸的一种或多种。 氟系化合物包括选自氢氟酸(HF),氟化铵(NH 4 F),氟化铵(NH 4 F-HF),四甲基氟化铵(N(CH 3)4 F),氟硼酸(HBF 4) 和氟苯(C_6H_5F)。
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公开(公告)号:KR1020080033007A
公开(公告)日:2008-04-16
申请号:KR1020060099524
申请日:2006-10-12
Applicant: 삼성전자주식회사
Inventor: 최정민
IPC: H01L29/78
CPC classification number: H01L29/6656 , H01L29/4933 , H01L29/665
Abstract: A semiconductor device and a method of manufacturing the same are provided to prevent the change of resistance characteristics in an LDD region by preventing abnormal growth of a silicide layer of source/drain regions. A gate electrode(120) including a first silicide layer(180) formed on an upper surface thereof is formed on an upper surface of a semiconductor substrate(100). A spacer(140) is formed on a lateral surface of the gate electrode. The spacer is recessed from the upper surface of the gate electrode. An oxide layer(130) is inserted between the gate electrode and the spacer. A first blocking layer(150) is formed on exposed sidewall of the gate electrode to cover the oxide layer. A source/drain region(170) is formed in the semiconductor substrate and includes a second silicide layer. A second blocking layer(160) is formed on an outer surface of the spacer to cover a part of the source/drain region.
Abstract translation: 提供半导体器件及其制造方法,以通过防止源极/漏极区域的硅化物层的异常生长来防止LDD区域中的电阻特性的变化。 在半导体衬底(100)的上表面上形成包括形成在其上表面上的第一硅化物层(180)的栅电极(120)。 在栅电极的侧表面上形成间隔物(140)。 间隔件从栅电极的上表面凹陷。 在栅电极和间隔物之间插入氧化物层(130)。 第一阻挡层(150)形成在栅电极的暴露的侧壁上以覆盖氧化物层。 源极/漏极区(170)形成在半导体衬底中并且包括第二硅化物层。 第二阻挡层(160)形成在隔离物的外表面上以覆盖源/漏区的一部分。
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公开(公告)号:KR1020030015640A
公开(公告)日:2003-02-25
申请号:KR1020010049482
申请日:2001-08-17
Applicant: 삼성전자주식회사
IPC: H01L21/3065
Abstract: PURPOSE: A cover ring of dry etch equipment is provided to eliminate a reason causing a particle by making the cover ring installed inside an etch process chamber composed of two parts so that only a part exposed to plasma is replaced. CONSTITUTION: An assistance ring(20) is exposed to plasma. A main ring(22) is not exposed to plasma, covered with the assistance ring. An exhaust ring of the dry etch equipment is composed of the assistance ring and the main ring. The covering is made of a quartz material. The main ring is made of a ceramic material. The assistance ring is installed in a position where the assistance ring is exposed and worn out.
Abstract translation: 目的:提供干蚀刻设备的盖环,以通过将盖环安装在由两部分组成的蚀刻处理室内,以便只有暴露于等离子体的部分被更换才能消除造成颗粒的原因。 构成:辅助环(20)暴露于等离子体。 主环(22)不暴露于等离子体,被辅助环覆盖。 干蚀刻设备的排气环由辅助环和主环组成。 覆盖物由石英材料制成。 主环由陶瓷材料制成。 辅助环安装在辅助环暴露并磨损的位置。
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公开(公告)号:KR1020020016284A
公开(公告)日:2002-03-04
申请号:KR1020000049542
申请日:2000-08-25
Applicant: 삼성전자주식회사
Inventor: 최정민
IPC: H01L21/3065
Abstract: PURPOSE: Equipment for fabricating a semiconductor is provided to prevent a process defect caused by ununiform temperature distribution of a wafer, by dividing a temperature control area of the wafer into a plurality of areas and by supplying a medium for controlling the temperature of the wafer to each areas while the flow of the medium is controlled according to the temperature of the wafer. CONSTITUTION: A predetermined semiconductor process is performed in a semiconductor device while the wafer(1) having uniform temperature distribution is settled in a designated position. The first wafer temperature distribution control unit divides the wafer into a plurality of areas, and supplies a predetermined quantity of cooling material to the respective areas to control the temperature of the wafer. The second wafer temperature distribution control unit finely controls the temperature of the wafer regarding the respective areas.
Abstract translation: 目的:提供用于制造半导体的设备,以通过将晶片的温度控制区域划分为多个区域并且通过将用于控制晶片的温度的介质提供给以防止由晶片的不均匀温度分布引起的工艺缺陷 每个区域,同时根据晶片的温度来控制介质的流动。 构成:在半导体器件中执行预定的半导体工艺,同时将温度分布均匀的晶片(1)定位在指定位置。 第一晶片温度分布控制单元将晶片分成多个区域,并将预定量的冷却材料供应到各个区域以控制晶片的温度。 第二晶片温度分布控制单元精细地控制晶片关于各个区域的温度。
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公开(公告)号:KR1019990032974A
公开(公告)日:1999-05-15
申请号:KR1019970054199
申请日:1997-10-22
Applicant: 삼성전자주식회사
IPC: H01L21/306
Abstract: 펌프 퍼지 가스의 유량을 MFC(Mass Flow Controller)로 제어하는 반도체 제조 장치에 관하여 개시한다. 본 발명에 따른 반도체 제조 장치는 반도체 제조를 위한 소정의 반응 챔버를 진공으로 유지시키는 적어도 1개의 펌프와, 상기 각 펌프에서의 퍼지 가스 유량을 소정의 설정 압력으로 제어하기 위한 적어도 1개의 MFC(Mass Flow Controller)와, 상기 챔버내에서의 압력 변화를 감지하는 커패시턴스 마노미터와, 상기 커패시턴스 마노미터에서 감지된 압력으로부터 압력 보정치를 구하는 차동 수단과, 상기 압력 보정치에 의하여 보정된 설정 압력에 의거하여 상기 MFC에서의 가스 유량을 제어하는 콘트롤러 메카니즘을 포함한다.
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公开(公告)号:KR102245136B1
公开(公告)日:2021-04-28
申请号:KR1020150025783
申请日:2015-02-24
Applicant: 삼성전자주식회사
IPC: H01L29/78
Abstract: 반도체소자형성방법을제공한다. 이방법은반도체기판상에복수의핀 활성영역들을한정하는소자분리영역을형성하는것을포함한다. 상기소자분리영역을갖는반도체기판상에희생게이트층을형성하고, 상기희생게이트층 상에상기제1 및제2 핀활성영역들을가로지르는제1 하드마스크라인, 및상기엣지핀 활성영역을가로지르는엣지하드마스크라인을형성하고, 상기제1 및엣지하드마스크라인들을갖는반도체기판상에복수의게이트컷 개구부들을갖는게이트컷 마스크를형성하고, 상기복수의게이트컷 개구부들은서로평행한라인모양의제1 게이트컷 개구부, 및엣지게이트컷 개구부를포함하고, 상기제1 게이트컷 개구부는상기제1 핀활성영역과평행하며상기제1 핀활성영역에인접하고, 상기엣지게이트컷 개구부는상기엣지핀 활성영역과평행하며상기엣지핀 활성영역과인접하며상기엣지하드마스크라인의끝 부분을노출시키고, 상기제1 게이트컷 개구부는제1 폭을갖도록형성되고, 상기엣지게이트컷 개구부는상기제1 폭보다크면서상기제1 폭의 2배보다작은제2 폭으로형성된다.
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公开(公告)号:KR1020130136354A
公开(公告)日:2013-12-12
申请号:KR1020120111722
申请日:2012-10-09
Applicant: 삼성전자주식회사
CPC classification number: A47L15/4208 , A47L15/0039 , A47L15/4206 , A47L2401/10 , A47L2501/36
Abstract: The present invention relates to a dish washer including: a washing chamber in which dishes are washed; a water collecting unit provided in the lower part of the washing chamber to be concave and collecting water used to wash dishes; a microfilter located in the water collecting chamber and filtering waste generated when dishes are washed; and a ultrasonic waves generating device radiating ultrasonic waves toward the microfilter, wherein the microfilter is automatically washed by the ultrasonic waves generating device, so that a user is not required to personally clean the microfilter.
Abstract translation: 洗碗机技术领域本发明涉及一种洗碗机,其包括:洗涤室,其中洗碗; 设置在所述洗涤室的下部以使其成为凹陷并收集用于洗涤餐具的水的集水单元; 位于集水室中的微过滤器,并且过滤洗碗时产生的废物; 以及超声波发生装置,朝向微型过滤器辐射超声波,其中,微超声波滤波器被超声波发生装置自动清洗,使得用户不需要亲自清洁微量过滤器。
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公开(公告)号:KR1020090008660A
公开(公告)日:2009-01-22
申请号:KR1020070071777
申请日:2007-07-18
Applicant: 삼성전자주식회사
Inventor: 최정민
IPC: H01L21/24 , H01L21/336
Abstract: A method for manufacturing a semiconductor device is provided to reduce a contact resistance by preventing permeation of a cobalt silicide by forming a buffer film pattern on an exposed part of a gate spacer made of oxide material on both sidewalls of a gate electrode. A first gate spacer(108) and a second gate spacer(110) are successively formed in a side part of a gate electrode(106). A source/drain region(112a,112b) is formed on a semiconductor substrate adjacent to a gate electrode. A blocking film pattern(116) is formed on the exposed surface of a first gate spacer. A cobalt film is formed on the surface. A cobalt silicide film(120) if formed by the reaction of the silicon included in the gate electrode and the source/drain region and the cobalt of the cobalt film.
Abstract translation: 提供了一种用于制造半导体器件的方法,通过在栅电极的两个侧壁上的由氧化物材料制成的栅极间隔物的暴露部分上形成缓冲膜图案来防止硅化钴渗透,从而降低接触电阻。 第一栅极间隔物(108)和第二栅极间隔物(110)依次形成在栅电极(106)的侧部中。 源极/漏极区(112a,112b)形成在与栅电极相邻的半导体衬底上。 在第一栅极间隔物的暴露表面上形成阻挡膜图案(116)。 在表面上形成钴膜。 如果通过栅电极中包含的硅与源/漏区的反应和钴膜的钴反应形成钴硅化物膜(120)。
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公开(公告)号:KR1020080028669A
公开(公告)日:2008-04-01
申请号:KR1020060094259
申请日:2006-09-27
Applicant: 삼성전자주식회사
IPC: H01L21/3205 , H01L21/28
CPC classification number: H01L21/76841 , H01L21/32139 , H01L21/76882
Abstract: A method for forming a metal line of a semiconductor device is provided to reduce cracks due to a groove on a surface of an aluminum layer by preventing migration of aluminum atoms. An insulating layer(110) is formed on an upper surface of a semiconductor substrate(100). A barrier layer(120) and a wetting layer(132) are laminated on the insulating layer. A surface of a concavo-convex structure is formed by etching a predetermined portion of an upper part of the wetting layer. A metal layer is formed on the wetting layer having the surface of the concavo-convex structure. An alloy layer is formed on a boundary between the metal layer and the wetting layer by performing a reflow process for the metal layer. A capping layer is formed on the metal layer. The barrier layer is formed by stacking a titanium layer and a titanium nitride layer.
Abstract translation: 提供了一种用于形成半导体器件的金属线的方法,以通过防止铝原子的迁移来减少由于铝层表面上的凹槽引起的裂纹。 绝缘层(110)形成在半导体衬底(100)的上表面上。 阻挡层(120)和润湿层(132)层叠在绝缘层上。 通过蚀刻润湿层的上部的预定部分来形成凹凸结构的表面。 在具有凹凸结构的表面的润湿层上形成金属层。 通过对金属层进行回流处理,在金属层和润湿层之间的边界上形成合金层。 在金属层上形成覆盖层。 阻挡层通过层叠钛层和氮化钛层而形成。
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