公开(公告)号：KR1020110093373A

公开(公告)日：2011-08-18

申请号：KR1020100013390

申请日：2010-02-12

Applicant: 삼성전자주식회사

Inventor： 서웅 ,  류수정 ,  김윤진 ,  조영철 ,  박일현 ,  오태욱

IPC: G06F12/04 ,  G06F1/32 ,  G06F12/06 ,  G06F12/08

CPC classification number: G06F13/1673 ,  Y02D10/14

Abstract: PURPOSE: A memory controller and computing device in which the memory controller is mounted are provided to improve a memory access bandwidth. CONSTITUTION: A memory controller(30) access a memory(90) with an arranged word unit and stores the memory in a data buffer. The memory controller extracts and outputs a requested data by responding to an unarranged memory access request of a processor. The memory controller includes a memory access unit(70) which access the memory with the arranged word unit and the tagged buffer(50).

Abstract translation: 目的：提供安装存储器控制器的存储器控​​制器和计算装置，以改善存储器存取带宽。 构成：存储器控制器（30）用排列的字单元访问存储器（90）并将该存储器存储在数据缓冲器中。 存储器控制器通过响应处理器的未经规定的存储器访问请求来提取并输出所请求的数据。 存储器控制器包括存储器访问单元（70），该存储器访问单元（70）利用排列的字单元和标记的缓冲器（50）访问存储器。

公开(公告)号：KR1020100094214A

公开(公告)日：2010-08-26

申请号：KR1020090013532

申请日：2009-02-18

Applicant: 삼성전자주식회사

Inventor： 이강웅 ,  류수정 ,  유동훈 ,  박일현

IPC: G06F9/30 ,  G06F9/44 ,  G06F9/06 ,  G06F17/00

CPC classification number: G06F15/82 ,  G06F9/30072 ,  G06F9/3853 ,  G06F9/06 ,  G06F9/30192 ,  G06F9/30196 ,  G06F17/606 ,  G06F17/608

Abstract: PURPOSE: An apparatus and a method for generating a VLIW(Very Long Instruction Word) instruction, and a VLIW processor and a method for processing the VLIW instruction are provided to configure and process the VLIW instruction by generating the instruction bundles through a VLIW instruction. CONSTITUTION: An instruction fetching unit(410) fetches an instruction bundle, and the instruction bundle is plural instructions performed in parallel and comprises the value showing the conditional execution by bundle unit. A decoder(420) decodes the instruction bundle. A command execution unit(430) performs instructions included in the instruction bundle according to value showing the conditional execution in parallel. The value showing the conditional execution is an index of a predicate register file.

Abstract translation: 目的：提供用于生成VLIW（超长指令字）指令的装置和方法，以及VLIW处理器和处理VLIW指令的方法，以通过VLIW指令生成指令束来配置和处理VLIW指令。 构成：指令提取单元（410）获取指令束，并且指令束是并行执行的多个指令，并且包括以束单位表示条件执行的值。 解码器（420）解码指令束。 命令执行单元（430）根据表示条件执行的值并行地执行指令包中包含的指令。 显示条件执行的值是谓词寄存器文件的索引。

公开(公告)号：KR1020090028385A

公开(公告)日：2009-03-18

申请号：KR1020070129136

申请日：2007-12-12

Applicant: 삼성전자주식회사

Inventor： 서동관 ,  류수정 ,  유동훈 ,  박일현

IPC: G06F9/455 ,  G06F1/26

CPC classification number: G06F17/5022

Abstract: An electric power simulation method and an electric power simulator are provided to improve the accuracy regardless of reducing the simulation carrying out time. A static information extracting unit(710) is the static information about the performance of a second instruction performed in a coarse grained array. That is, the static information extracting unit extracts the static information based on the configuration information of the coarse grained array. The dynamic information extracting unit(720) the dynamic information about the performance of a second instruction performed in a coarse grained array. The calculation unit(730) calculates the estimation electric power of processor based on static and dynamic information by reflecting the processing property of the processor.

Abstract translation: 提供电力模拟方法和电力模拟器，以提高精度，而不管减少模拟执行时间。 静态信息提取单元（710）是关于在粗粒度阵列中执行的第二指令的执行的静态信息。 也就是说，静态信息提取单元根据粗粒子阵列的配置信息提取静态信息。 动态信息提取单元（720）关于在粗粒度阵列中执行的第二指令的性能的动态信息。 计算单元（730）通过反映处理器的处理特性，基于静态和动态信息来计算处理器的估计电力。