-
-
公开(公告)号:KR101723751B1
公开(公告)日:2017-04-05
申请号:KR1020150167710
申请日:2015-11-27
Applicant: 한국항공우주연구원
Abstract: 위성체의측정데이터를이용하여위치정보의예측값을생성하는항법제어장치및 방법이제공된다. 항법제어방법은 GPS 위성으로부터수신된위성데이터를이용하여상기위성체의위치정보의초기값을설정하는단계, 상기위성체의기설정된궤도에대응하는상태벡터를계산하는단계, 상기위성체의센싱된측정데이터를이용하여상기상태벡터를업데이트하는단계및 상기업데이트된상태벡터및 상기위치정보의초기값을이용하여최소오차를갖는위치정보의예측값을계산하는단계를포함할수 있다.
Abstract translation: 提供了一种用于使用卫星的测量数据来生成位置信息的预测值的导航控制设备和方法。 该导航控制方法包括以下步骤:使用从GPS卫星接收的卫星数据设置卫星的位置信息的初始值,计算与卫星的预定轨道相对应的状态矢量, 使用更新后的状态向量和位置信息的初始值来更新状态向量,并且计算具有最小误差的位置信息的预测值。
-
公开(公告)号:KR1020090066621A
公开(公告)日:2009-06-24
申请号:KR1020070134246
申请日:2007-12-20
Applicant: 한국항공우주연구원
Abstract: An input/output data simulating apparatus capable of high-speed data transmission by receiving and transmitting input/output data through space wire between a target computer and the input/output data simulator are provided to inspect the software mounted on the target computer without implementing the hardware processing device. A space wire interface(120) performs connection with a target computer(100) with software. An I/O controller(220) controls dual port memory operation by receiving I/O writing instruction or I/O reading instruction from the target computer. A PCI(Programmable Communication Interface) interface(240) delivers input/output data stored in the dual-ported memory to the terminal.
Abstract translation: 提供能够通过目标计算机和输入/输出数据模拟器之间的空间线接收和发送输入/输出数据而进行高速数据传输的输入/输出数据模拟装置,以检查安装在目标计算机上的软件,而不执行 硬件处理装置。 空间线接口(120)利用软件来执行与目标计算机(100)的连接。 I / O控制器(220)通过从目标计算机接收I / O写入指令或I / O读取指令来控制双端口存储器操作。 PCI(可编程通信接口)接口(240)将存储在双端口存储器中的输入/输出数据传送到终端。
-
公开(公告)号:KR100465421B1
公开(公告)日:2005-01-13
申请号:KR1020020077882
申请日:2002-12-09
Applicant: 한국항공우주연구원
IPC: G06F13/00
Abstract: PURPOSE: A hardware memory scrubber is provided to shorten scrub time and reduce load by performing the memory scrub with hardware in a memory system of a satellite. CONSTITUTION: A scrub control block(110) generates a scrub execution control signal for executing the scrub of a mass memory control FPGA(Field Programmable Gate Array)(200), a page generating signal for scrubbing each page of a memory, and an address needed for executing the scrub. A multiplexer block(120) transmits the address, the data, and the control signal of the scrub control block to the mass memory FPGA. The scrub control block comprises a control block generating the scrub control signal by checking the time for executing the scrub, an address generating block generating the address needed for the scrub, and a page generating block generating the control signal for selecting the scrub page of a mass memory.
Abstract translation: 目的:提供硬件内存擦除器,通过在卫星的存储器系统中用硬件执行内存擦洗来缩短擦洗时间并减少负载。 构成:擦洗控制块(110)产生用于执行大容量存储器控制FPGA(现场可编程门阵列)(200)的擦洗的擦洗执行控制信号,用于擦洗存储器的每页的页面产生信号,以及地址 需要执行擦洗。 多路复用器块(120)将擦洗控制块的地址,数据和控制信号传送到大容量存储器FPGA。 擦洗控制块包括通过检查执行擦洗的时间而产生擦洗控制信号的控制块,产生擦洗所需的地址的地址产生块和产生用于选择擦除的擦除页的控制信号的页面产生块 大众记忆。
-
-
-