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公开(公告)号:EP3050057A1
公开(公告)日:2016-08-03
申请号:EP13894157.0
申请日:2013-09-27
Applicant: Hewlett Packard Enterprise Development LP
Inventor: BENEDICT, Melvin K. , POPE, Eric L. , WALTON, Andrew C.
IPC: G11C7/10
CPC classification number: G06F11/2038 , G06F3/0619 , G06F3/0656 , G06F3/0683 , G06F11/1016 , G06F11/1446 , G06F11/2058 , G06F11/2069 , G06F2201/84 , G11C7/1012 , G11C7/1033 , G11C29/846
Abstract: Example implementations relate to using a spare memory on a memory module. In example implementations, a memory module may have a plurality of memories, including default memories and a spare memory. A plurality of data buffers on the memory module may select data nibbles from the plurality of memories such that when a default memory is identified as defective, a data nibble is selected from the spare memory and not from the defective default memory. A data nibble selected from the default memory may be in a first position in an output of the memory module when the default memory is functional. A data nibble selected from the spare memory may be in a second position in the output of the memory module.
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公开(公告)号:EP2992531B1
公开(公告)日:2019-06-19
申请号:EP13883675.4
申请日:2013-04-30
Applicant: Hewlett Packard Enterprise Development LP
Inventor: BENEDICT, Melvin K. , POPE, Eric L. , WALTON, Andrew C.
IPC: G11C11/40 , G11C11/406 , G11C11/401 , G11C11/4063 , G11C7/02 , G11C29/02 , G11C29/04 , G06F3/06 , G11C7/10 , G11C11/408
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公开(公告)号:EP3014449A1
公开(公告)日:2016-05-04
申请号:EP13888427.5
申请日:2013-06-27
Applicant: Hewlett Packard Enterprise Development LP
Inventor: BENEDICT, Melvin K.
CPC classification number: G06F11/0772 , G06F11/073 , G06F11/0751 , G06F11/079 , G06F11/1004 , G06F11/1405 , G06F11/141 , G06F13/1689 , G06F13/1694 , G11B20/10222
Abstract: A technique includes receiving, by a device a command, wherein a response to the command is expected from the device within a predetermined response time. The device may selectively generate an error signal to allow time for the device to complete processing the command.
Abstract translation: 一种技术包括由设备接收命令,其中在预定的响应时间内从设备预期对该命令的响应。 设备可以选择性地产生错误信号,以允许设备完成处理命令的时间。
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