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公开(公告)号：DE1524772A1
公开(公告)日：1970-07-02
申请号：DE1524772
申请日：1967-01-17
Applicant: IBM
Inventor： ANACKER WILHELM
Abstract: 1,139,039. Data storage apparatus. INTERNATIONAL BUSINESS MACHINES CORP. 16 Jan., 1967 [17 Jan., 1966], No. 2153/67. Heading H3B. In a random access memory, including an array of bit storage cells and array lines for storing data in or reading data from groups of storage cells, each array line includes a conductor inductively coupled to a group of storage cells, a current return path parallel to the conductor and means providing a leakage resistance between the conductor and its return path so that the ratio of the shunt conductance (g) to the shunt capacitance (c) per unit length of line is approximately equal to the ratio of the series resistance (r) to the series inductance (l) per unit length of line, whereby pulses are transmitted without distortion. In Figs. 1 and 3 bit-sense lines 32 and word lines 34 are separated by a layer of lossy dielectric material 30 from a layer of magnetic material 20. Current return path 22 may be formed of separate blocks 24, as shown, in which case the magnetic layer is also in sections, or may be of integral construction. Since dielectric 30 is lossy a bit pulse launched from driver 40 will be attenuated as it progresses along line 32. To overcome this the line is tapered so that the storage regions in film 20, the dimensions of which regions are defined by the dimensions of the intersecting conductors 32, 34, become progressively smaller along line 32. Tapering of the bit-sense line also causes both g and c to vary in proportion to the width W of the line, and both r and I to vary g r in inverse proportion to W so that both -- and - c l are constant throughout the line. Since the characteristic impedance of the line varies along its length resistance 43 is selected to match the characteristic impedance of that end of the line to which it is connected. Instead of using a tapered bit-sense line the storage regions may be in the form of discrete film areas of different materials. In a modification, Fig. 8, the dielectric 30 is in the form of a series of segments having different thicknesses and approximating, over a large number of segments, to a continuously tapered dielectric. The dielectric need not itself be lossy if lumped resistors 44 are provided between adjacent segments. The bit-sense line 32 is similarly stepped instead of being continuously tapered. The storage regions 38 consist of groups of discrete magnetic film deposits having different areas and thicknesses. As a result the output signals to the sense amplifier will have the same amplitude whichever storage region they originate from. The use of a tapered dielectric causes the characteristic impedance Z 0 of the line to remain constant throughout, and for distortionless transmission it is then necessary for the relationship g =r/Z 2 0 to be maintained, which can be achieved by selection of suitable resistors 44. The bit-sense lines of a plurality of memory planes may be connected in series through booster amplifiers. A magnetic core memory is also referred to with cores having graduated sizes or properties distributed along the array line.
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公开(公告)号：DE1901343A1
公开(公告)日：1969-08-14
申请号：DE1901343
申请日：1969-01-11
Applicant: IBM
Inventor： ANACKER WILHELM , P WANG CHU
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