公开(公告)号：CA1097809A

公开(公告)日：1981-03-17

申请号：CA265622

申请日：1976-11-15

Applicant: IBM

Inventor： HELLER LAWRENCE G

IPC: H03M1/44 ,  G11C19/36 ,  H01L21/339 ,  H01L29/762 ,  H03M1/00 ,  G11C11/40

Abstract: A CHARGE-COUPLED-DEVICE QUANTIZING CIRCUIT A device for quantizing analog signals employing chargecoupled-device technology including a p-type substrate such as silicon having a dielectric insulating layer thereon which may be silicon dioxide. A plurality of gates or electrodes are embedded in the insulating layer and are arranged in linear relationship to alternately form potential wells in the substrate and to function as transfer gates between the wells. An analog signal represented by a quantity of charge carriers is injected into substrate and is transferred through the substrate to sequentially fill the potential wells until the original quantity of charge carriers is exhausted. The potential wells can be equal in size so that each filled well contains equal amounts of charge carriers. When the original quantity of charge carriers is exhausted the charge carriers in each of the filled wells are discretely shifted out of the quantizer to a threshold detector and the separate charge carrier packets from each potential well are counted to provide a measure of the amplitude of the original analog signal in digital form. The circuit has the flexibility that the depth of the potential wells, and therefore the quantizing step size can be controlled by the relative bias potentials applied to the gates.

公开(公告)号：CA1097808A

公开(公告)日：1981-03-17

申请号：CA265621

申请日：1976-11-15

Applicant: IBM

Inventor： HELLER LAWRENCE G

IPC: G11C7/02 ,  G11C19/28 ,  G11C27/04 ,  H01L21/339 ,  H01L29/762 ,  H01L29/768 ,  G11C11/40

Abstract: INPUT CIRCUIT FOR INSERTING CHARGE PACKETS INTO A CHARGE-TRANSFER-DEVICE An input circuit for a charge-transfer-device such as a bucket-brigade or charge-coupled-device incorporating an input terminal connected to an input diode source diffusion of the charge-transfer-device through a capacitor C. The nonlinear depletion capacitance Cd associated with the input circuit is schematically shown connected in parallel with C at a first node. The non-linear capacitance Cd, which is parasitic, is a basic cause of distortion of the input charge packets. The input circuit further includes an active device such as an IGFET connected in parallel with the input terminal to provide a supply of charge carriers. The gate of the active device is connected to a reset signal source.

公开(公告)号：CA1092708A

公开(公告)日：1980-12-30

申请号：CA264591

申请日：1976-10-25

Applicant: IBM

Inventor： HELLER LAWRENCE G

IPC: H01L29/762 ,  G11C19/28 ,  H01L21/339 ,  H01L27/10 ,  H01L29/768 ,  H01L29/78

Abstract: A METHOD AND APPARATUS FOR REPLICATING A CHARGE PACKET A method and apparatus for duplicating or replicating an original packet of charge carriers such as electrons or holes while leaving the original charge packet unchanged and still available for further processing is described. A charge-coupled device (CCD) circuit is provided using gate displacement charge flow in combination with a bucket brigade circuit. The CCD circuit includes a first +CCD well, a source diffusion and a second CCD well. An original charge packet is introduced into the first CCD well, the gate of which being precharged to a given source potential. The charge packet in the first CCD well reduces the magnitude of the source potential and it is immediately restored by current flow which in turn causes charge carriers to transfer from the source diffusion into the second CCD well until a charge packet is contained in the second CCD well which is a replica of the original charge packet.

公开(公告)号：FR2376517A1

公开(公告)日：1978-07-28

申请号：FR7736922

申请日：1977-11-30

Applicant: IBM

Inventor： CHAMBERLAIN SAVVAS G ,  HELLER LAWRENCE G

IPC: H04N3/12 ,  H01L27/148 ,  H01L27/14 ,  G11C19/28

公开(公告)号：FR2336805A1

公开(公告)日：1977-07-22

申请号：FR7634823

申请日：1976-11-12

Applicant: IBM

Inventor： CHAMBERLAIN SAVVAS G ,  HELLER LAWRENCE G

IPC: H01L31/10 ,  H01L31/113 ,  H01L31/06

Abstract: A solid-state charge-coupled photoconductor for image scanning including a p-type substrate having a silicon dioxide layer on the surface thereof with the exception of one or more areas in which an n+ diffusion area is located. A polysilicon gate is located over the silicon dioxide layer and a second silicon dioxide layer is located over the polysilicon layer and the n+ diffusion area except for a portion where a first aluminum contact window is provided which extends through the second silicon dioxide layer to the surface of the n+ diffusion area and where a second aluminum contact window extends through the second polysilicon gate to the surface of the polysilicon gate. The photosensitivity of the device is electronically controlled due to the relatively small n+ layer which is reversed biased with respect to the larger gate area.

公开(公告)号：CA971228A

公开(公告)日：1975-07-15

申请号：CA152608

申请日：1972-09-27

Applicant: IBM

Inventor： HELLER LAWRENCE G

IPC: G11C11/413 ,  G01R19/155 ,  G01R29/24 ,  G11C11/401 ,  G11C11/404 ,  G11C11/4094 ,  G11C11/4099 ,  G11C19/28 ,  G11C29/00 ,  G11C29/04 ,  G11C29/56

Abstract: The amount of charge stored in a charge storage system can be transferred with negligible loss from the storage system to a charge detector without regard to the size of any distributed capacitance present on the line transferring the charge. This is achieved by charging a detector capacitor and the capacitance of the transfer line, to a reference voltage, allowing the stored charge system and the transfer line capacitance to equalize at a voltage level below the reference voltage, and transferring charge from the detector capacitor to the line capacitance and the charge storage system to return the line and the charge storage system to the reference voltage of charge. The voltage remaining on the detector capacitor is then equal to the original state of charge in the storage system.