公开(公告)号：DE69626590D1

公开(公告)日：2003-04-17

申请号：DE69626590

申请日：1996-10-01

Applicant: IBM

Inventor： JUDD IAN DAVID ,  LUNING STEPHEN G

IPC: G06F3/06

Abstract: Disclosed is an array controller for controlling the transfer of data from a host system to an array of data storage devices, comprising a processor connected via a local bus to a data buffer in which data is staged during said transfer. The array controller is provided with a buffer controller for controlling the operation of the buffer and is further provided with channel hardware for manifesting a plurality of data channels, selectable by the local bus address, over which data is transferred in and out of the data buffer.

公开(公告)号：DE69120659D1

公开(公告)日：1996-08-08

申请号：DE69120659

申请日：1991-02-19

Applicant: IBM

Inventor： SHAH VINAY VELJI ,  JUDD IAN DAVID ,  GRAINGER BERNARD JOHN ,  COCKBURN GORDON JOHN

IPC: H04L1/16 ,  H04L1/18

Abstract: PCT No. PCT/GB91/00257 Sec. 371 Date Sep. 25, 1992 Sec. 102(e) Date Sep. 25, 1992 PCT Filed Feb. 19, 1991 PCT Pub. No. WO92/10893 PCT Pub. Date Jun. 25, 1992.Described is a method of error recovery in a data communication system of the kind comprising two nodes connected by a serial link and wherein data is transmitted between the nodes in the form of packets of a predefined format. Each node receives data over an inbound line and transmits data over an outbound line. When an error is detected, both nodes enter a link check state, invoke a Link Error Recovery Procedure (ERP) and exchange status by means of Link Resets. Error recovery is performed separately for each line. Each node is responsible for recovering packets that were lost on its outbound line. In normal operation of the link, the transmitter does not reuse a packet buffer until it has received a response from the connected node indicating that the packet was correctly received. Therefore when an error occurs, the affected packets are still available for retransmission.

公开(公告)号：DE69119076D1

公开(公告)日：1996-05-30

申请号：DE69119076

申请日：1991-12-05

Applicant: IBM

Inventor： JUDD IAN DAVID ,  APPERLEY NORMAN

IPC: G06F3/06 ,  G11B19/28 ,  G11B27/00 ,  G11B27/10 ,  G06F13/42

Abstract: A spindle synchronisation technique is described which is useful in a disk array subsystem comprising a plurality of disk drives (40,41,42,43) connected by means of serial links (25,26,27,28) to a disk drive controller (20). Data and command information is transmitted over the link in the form of multi-character frames, the flow of which is regulated by special ten bit protocol characters. A SYNC protocol character is defined which is used to synchronise the spindles of the disk drives. This SYNC character is issued by controller to selected ones of the drives over the same link used for the transmission of the command and data information. The SYNC character may be interleaved between the characters of frames being transmitted over the link.

公开(公告)号：DE3064685D1

公开(公告)日：1983-10-06

申请号：DE3064685

申请日：1980-04-18

Applicant: IBM

Inventor： JUDD IAN DAVID ,  PATON ANDREW

IPC: H04N9/18 ,  G09G1/00 ,  G09G1/04 ,  G09G1/28 ,  H01J31/20 ,  H04N9/20

公开(公告)号：DE3061486D1

公开(公告)日：1983-02-03

申请号：DE3061486

申请日：1980-04-18

Applicant: IBM

Inventor： JUDD IAN DAVID

IPC: H01J31/20 ,  G09G1/04 ,  G09G1/28 ,  H01J29/07 ,  H01J29/32 ,  H04N9/24 ,  H04N9/28 ,  H01J29/08

Abstract: In shadow mask color cathode-ray tube apparatus, the shadow mask is provided with slits or rows of slots extending from side to side of the mask and a line raster is constrained so that the lines of the raster are colinear with the slits, there being just one slit to each line of the raster. Open loop control may be used to achieve colinearity, but closed loop control is preferred. Beam position signals may be drived from the shadow mask by sensing secondary emission from different phosphors on the gun side of the mask or be sensing currents generated in the mask. In the preferred embodiment, the beams are dithered as they traverse the raster and the difference in the currents generated by a beam at the mask and at the conductive layer at the tube screen is detected. The first fundamental of the difference current indicates by its amplitude and phase the amount and direction of the misregistration of a beam and a slit. Different beams are distinguished by frequency multiplexing.

公开(公告)号：AU3165977A

公开(公告)日：1979-06-21

申请号：AU3165977

申请日：1977-12-16

Applicant: IBM

Inventor： EVANS JOHN MAURICE ,  JUDD IAN DAVID ,  LOVIE RICHARD HENRY ,  MINSHULL JOHN FRANCIS

IPC: H04N5/262 ,  G06K9/54 ,  G06T3/00 ,  G06T9/20 ,  G06T11/20 ,  G09G5/36 ,  H04N1/411 ,  H04N1/02 ,  H04N1/04

Abstract: Graphical data on a document is raster scanned and the resulting bit pattern is processed to provide a processed bit pattern which represents lines which each are a single pel in width and indicative of the shapes of objects scanned on the document. These single pel wide lines may represent the outlines of objects on the center lines. The processed bit pattern is then directed to a line follower in which bits representing contiguous pels are detected and tested for linearity. When contiguous pels fail the linearity test, a new vector is started and the vector being tracked is terminated. Hardware for performing these operations is described. The resulting vector list is stored until needed for display. Optionally a display station can be used to correct faulty vectors or to encode alphanumeric data in a more convenient format than vector coding.

公开(公告)号：GB2402803A

公开(公告)日：2004-12-15

申请号：GB0313419

申请日：2003-06-11

Applicant: IBM

Inventor： JUDD IAN DAVID

IPC: G06F3/06 ,  G06F11/10 ,  G11B20/18

Abstract: An arrangement for detection of write errors in a disk storage system 100 by using phase fields F, to improve data integrity and have a low impact on disk performance. User data blocks D are divided into groups 120 and a check block P is inserted after each group. The check block P contains the phase field F and is updated each time the group is written. The phase field F could be a single bit field which is inverted after each write or it could be a multi-bit counter which is incremented after each write. The check block P may also contain an XOR combination of the data blocks D or it may also contain an XOR combination of the logical block address or LBA 220 of the group.

公开(公告)号：GB2377144B

公开(公告)日：2004-11-10

申请号：GB0117092

申请日：2001-07-13

Applicant: IBM

Inventor： BEER REGINALD ,  CASHMAN PAUL NICHOLAS ,  JUDD IAN DAVID ,  HOOTON PAUL ,  MADDOCK ROBERT FRANK ,  MORRIS NEIL ,  NICHOLSON ROBERT BRUCE ,  WHYTE BARRY DOUGLAS

IPC: H04L12/437 ,  H04L45/28

Abstract: A method and apparatus for recovery from faults in a loop network (500) is provided. The loop network (500) has a plurality of ports (520, 530, 532, 534) serially connected with means for bypassing the ports (520, 530, 532, 534) from the loop network (500). A control device (522, 524) is provided with bypass control over at least one of the ports (530, 532, 534). A host means (502) sends a command to the control device (522, 524) at regular intervals and the control device (522, 524) has a counter which restarts a time period at the receipt of each command. If the time period expires, the control device (522, 524) activates the means for bypassing all the ports (530, 532, 534) under its control. The loop network (500) may have two loops (516, 518) with at least some of the ports (520, 530, 532, 534) common to both loops (516, 518).

公开(公告)号：GB2376612A

公开(公告)日：2002-12-18

申请号：GB0114614

申请日：2001-06-15

Applicant: IBM

Inventor： CASHMAN PAUL NICHOLAS ,  NICHOLSON ROBERT BRUCE ,  MADDOCK ROBERT FRANK ,  BEER REGINALD ,  MORRIS NEIL ,  JUDD IAN DAVID ,  WHYTE BARRY DOUGLAS ,  HOOTON PAUL

IPC: H04L12/24 ,  H04L12/437 ,  H04L12/42 ,  H04L12/26

Abstract: A method and apparatus are provided for fault location in a loop or ring network (100, 200, 400) . The network system having a host port (214) for supplying and receiving data and a plurality of successively connected ports (201, 202, 203, 204, 205) through which data from the host port (214) is transferred. A counter (122) for each port records data transfers in which the amount of data received at a destination port is less than an expected amount of data. When a transfer with less than the expected amount of data is identified for a data flow between a sending port (201) and a destination port (214), the counters are incremented for each port (202, 203, 204, 205, 214) after the sending port up to and including the destination port. Analysing means determines a fault location in the network system from the distribution of counts in the counters (122).

公开(公告)号：DE69331868D1

公开(公告)日：2002-06-06

申请号：DE69331868

申请日：1993-05-18

Applicant: IBM

Inventor： JUDD IAN DAVID ,  BEER REGINALD

IPC: H04L12/56

Abstract: Described is a network addressing scheme in which a message sent from a source node to a destination node include a path address which defines the path over which the message should travel to reach the destination node. At each node between the source and destination, the path address is compared against a predetermined value, and on determining that the address and predetermined value are different, the node modifies the address before forwarding the message onto the next node. In a switch node having three or more ports, the identity of the output port is determined from the path address and a portion of the address is deleted before sending the message out on that output port. Also described is a method of configuring a network in which one or more initiator nodes are defined, the initiator nodes issuing query messages to an adjacent node which responds by sending the initiator details of the number of operational ports which are implemented in the adjacent node. The initiator node then issues query messages addressed to those nodes which are attached to the operational ports on the adjacent node. This continues until the initiator has walked through the entire network at which point the configuration process is complete.