-
公开(公告)号：US3646516A
公开(公告)日：1972-02-29
申请号：US3646516D
申请日：1970-04-15
Applicant: IBM
Inventor： FLINDERS MICHAEL , GARDNER PETER LYCETT , HALLETT MICHAEL HENRY , JONES JOHN W , MINSHULL JOHN FRANCIS , TAYLOR KEITH GRAHAM
CPC classification number: G06F11/1625
Abstract: Error detection circuitry employs duplicate equal order binary registers and comparison circuitry for detecting and diagnosis of errors in data bits being transferred between the storage registers and a data bus.
-
公开(公告)号：DE2752421A1
公开(公告)日：1978-06-22
申请号：DE2752421
申请日：1977-11-24
Applicant: IBM
Inventor： EVANS JOHN MAURICE , JUDD IAN DAVID , LOVIE RICHARD HENRY , MINSHULL JOHN FRANCIS
IPC: H04N5/262 , G06K9/54 , G06T3/00 , G06T9/20 , G06T11/20 , G09G5/36 , H04N1/411 , G06K9/16 , G06K15/20
Abstract: Graphical data on a document is raster scanned and the resulting bit pattern is processed to provide a processed bit pattern which represents lines which each are a single pel in width and indicative of the shapes of objects scanned on the document. These single pel wide lines may represent the outlines of objects on the center lines. The processed bit pattern is then directed to a line follower in which bits representing contiguous pels are detected and tested for linearity. When contiguous pels fail the linearity test, a new vector is started and the vector being tracked is terminated. Hardware for performing these operations is described. The resulting vector list is stored until needed for display. Optionally a display station can be used to correct faulty vectors or to encode alphanumeric data in a more convenient format than vector coding.
-
公开(公告)号：DE2963778D1
公开(公告)日：1982-11-11
申请号：DE2963778
申请日：1979-09-12
Applicant: IBM
Inventor： MINSHULL JOHN FRANCIS , BRAZDIL PAVEL
Abstract: Data manipulation apparatus is described for converting raster-scanned data received, for example, from a scanner 2 at a first picture element (pel) resolution to a second lower pel resolution for display, for example, on a CRT terminal 4. The apparatus includes a scale-changing means 8 which functions to replace selected subgroups of pels in the input image by single pels at its output. The significance of each single pel reflects the presence or absence of a pel representing part of an image object in the associated subgroup of pels. The number of pels in the selected subgroups are determined by the degree of compression required to convert to the lower pel resolution. Prior to scale change, the apparatus functions to modify the input data in order to minimize merging of adjacent image objects as a result of scale change and thereby improve the legibility of the output image at the lower resolution. The scanned data is first supplied to a data sensitive thinner 5 which detects narrow gaps between adjacent objects and selectively detects image object edge pels in order to widen the gap. The selectively thinned scanned data is then supplied to a further thinner 6 which removes excess image pels from selected edges of the image objects. The data from thinner 6 is then supplied to a data sensitive merge inhibit unit 7 which moves selected image object pels from a subgroup in which merging as a result of scale change will occur to an adjacent subgroup where merging will not occur. Removal of a pel by the selective thinner 5, or by the thinner 6 or movement of a pel by unit 7 is inhibited if to do so would result in fragmentation of the associated image object.
-
公开(公告)号：AU3165977A
公开(公告)日：1979-06-21
申请号：AU3165977
申请日：1977-12-16
Applicant: IBM
Inventor： EVANS JOHN MAURICE , JUDD IAN DAVID , LOVIE RICHARD HENRY , MINSHULL JOHN FRANCIS
IPC: H04N5/262 , G06K9/54 , G06T3/00 , G06T9/20 , G06T11/20 , G09G5/36 , H04N1/411 , H04N1/02 , H04N1/04
Abstract: Graphical data on a document is raster scanned and the resulting bit pattern is processed to provide a processed bit pattern which represents lines which each are a single pel in width and indicative of the shapes of objects scanned on the document. These single pel wide lines may represent the outlines of objects on the center lines. The processed bit pattern is then directed to a line follower in which bits representing contiguous pels are detected and tested for linearity. When contiguous pels fail the linearity test, a new vector is started and the vector being tracked is terminated. Hardware for performing these operations is described. The resulting vector list is stored until needed for display. Optionally a display station can be used to correct faulty vectors or to encode alphanumeric data in a more convenient format than vector coding.
-
公开(公告)号：BR8103165A
公开(公告)日：1982-08-24
申请号：BR8103165
申请日：1981-05-21
Applicant: IBM
Inventor： MADDOCK ROBERT FRANK , MARKS BRIAN LAWTON , MINSHULL JOHN FRANCIS , PINNELL MARTIN C
-
Patent Agency Ranking
公开(公告)号：DE2642205A1
公开(公告)日：1977-03-31
申请号：DE2642205
申请日：1976-09-20
Applicant: IBM
Inventor： BARCLAY DONALD JOHN , BIRD COLIN LEONARD , HALLETT MICHAEL HENRY , MINSHULL JOHN FRANCIS , OWEN CHARLES EDWARD , KIRKMAN DAVID HORROBIN
Abstract: 1473772 Controlling light INTERNATIONAL BUSINESS MACHINES CORP 30 Sept 1975 39872/75 Heading G2F [Also in Division G5] In a display device comprising a transfer electrode El, a dump electrode E2 and a plurality of display electrode E3 immersed in a liquid electrolyte, a potential difference is first applied between electrodes E1 and E2 such as to deposit coloured material on E1, and subsequently a potential difference is applied between E1 and at least one electrode E3 so as effectively to transfer the coloured material to the selected electrode(s) E3. In Fig. 2, dot electrodes E3 are arranged in rows and columns, each column having a respective electrode E1 and E2 and the electrolyte being separated from that in adjacent columns by partitions 14 or by being contained in channels in a substrate. If the coloured material is such as to deposit at a cathode, it is initially deposited on selected electrode E1 by earthing the conductor 15 (FET 18, input T2) and by turning on selected FETs 19 to render corresponding electrode E2 positive. FETs 19 are controlled by a like array of bi-stables 23 forming an input/output register 24, AND gate 22 and control input Cl applied simultaneously with input T2. Subsequently an input T1 renders conductor 15 positive and, in the previously selected columns only, the coloured material is effectively transferred to the electrodes E3 of a selected row by activating the corresponding row input R2 (row conductor to earth). By repeating the process the array is scanned row sequentially. Non-linear resistances Z, e.g. oppositely poled diodes connected in parallel, are preferably provided between each electrode E1 and E3 and its row conductor. Erasure of the display is by turning on FETs 21 (input C2) and successively energizing terminals R1, or by short-circuiting the electrodes E3 to the dump electrode E2. The former erasure method may be used when the display requires refreshing to overcome dissipation of the coloured material by diffusion effects. The current between an electrode E2 and a coloured electrode E3 causes a current sense amplifier 27 to set the respective bi-stable 23 for a subsequent re-writing step. Partial or complete erasure of the display due to electrical read-out thereof may be counteracted similarly by applying sequential positive and negative current pulses across electrodes E2 and E3, the nett current being zero. During the positive pulse, terminal 29 is energized and the current between a written electrode and the electrode E2 produces an output from the amplifier 27, so that the following negative pulse restores the electrode E3 to its original written state. The device may also be constructed as a seven segment display.
-
公开(公告)号：DE2233893A1
公开(公告)日：1973-02-08
申请号：DE2233893
申请日：1972-07-10
Applicant: IBM
Inventor： HOLMES JOHN JAMES , JOYCE LESLIE ALAN , MINSHULL JOHN FRANCIS
-
公开(公告)号：GB2273800A
公开(公告)日：1994-06-29
申请号：GB9226933
申请日：1992-12-24
Applicant: IBM
Inventor： ANTHIAS TAF , MINSHULL JOHN FRANCIS , HALLIWELL HARRY
Abstract: In a distributed data processing system running multiple applications A1, A2, A3 located on a client system 4, resources specific to an application and which have no impact on the overall display at a server 2 are stored in application address space. Resources which have an effect on the overall system and which are managed in the client system are stored in protected, common, presentation address space in the client system. Resources which have an overall effect and are managed in the server system are stored in the display server system.
-
公开(公告)号：AU3161477A
公开(公告)日：1979-06-21
申请号：AU3161477
申请日：1977-12-15
Applicant: IBM
Inventor： JUDD IAN DAVID , MINSHULL JOHN FRANCIS
Abstract: 1517869 Image encoding apparatus INTERNATIONAL BUSINESS MACHINES CORP 20 Dec 1976 53034/76 Heading H4P Data in the form of a stream of bits representing picture elements (pels), derived from the raster scanning of a document 1, is stored in compressed form in a store 8 which can be accessed so that the data pertaining to the stored document can be transmitted to a receiver 13 or can be expanded in a decompressor 9 for plotting or printing by a plotter 10 or for display on a display unit. The required compression is effected by passing the original bit stream through a pel stripper 3 where bits are removed to leave a processed bit pattern in which the bits represent predominantly single-pel-width strokes constituting either the outlines or the centre lines of characters. A segment follower 6 detects contiguous bits and produces a series of segments representing the tracked strokes. Each segment is coded in an encoder 7 into code words representing the shape of the segments and code words representing the end points of the segments, the segment bit thus produced being stored in the store 8. The stripping process is described with reference to Fig. 2 (not shown), whilst the constraints which determine whether a pel is or is not stripped from the original bit stream are described with reference to Figs. 5 and 6 (not shown). Suitable arrangements for the units 3, 6 and 7 are described with reference to Figs. 7 to 13 (not shown).
-
公开(公告)号：GB1153420A
公开(公告)日：1969-05-29
申请号：GB2217768
申请日：1968-05-10
Applicant: IBM
Inventor： ARULPRAGASAM JEGANANDARAJ AMAL , HOCKINGS MICHAEL LE HEGARAT KI , MINSHULL JOHN FRANCIS , PINNELL MARTIN COXWELL , STAFFORD THOMAS SANDERSON
IPC: G06F9/48
Abstract: 1,153,420. Computer interrupt. INTERNATIONAL BUSINESS MACHINES CORP. 10 May, 1968, No. 22177/68. Heading G4A. In a data processing system, an interrupt condition causes the status of the current programme to be stored in a first area, a second area to be allocated to a new programme, and the address of the first area to be entered into the second area. In a two-processor microprogramme-controlled system, the highest priority interrupt request not masked by a status register selects a double-word from a (stored) interrupt list according to the class of interrupt. The doubleword includes a bit-pair and an address. If the bit-pair is 01, 10 or 11, the address is that of an interrupt class list. If the bit-pair is 01, the interrupt code (which gives details of the interrupt) is shifted and used to select another double-word from the interrupt class list. If the bit-pair is 10, the interrupt code is decremented by a so-called "mask" in the interrupt class list and one of two double-words selected from this list according as the result is negative or not. If the bit-pair is 11, the interrupt code is ANDed with the "mask" and one of the two doublewords selected according as the result is zero or not. If the bit-pair is 00, the address is that of a status load block. In this way a sequence of one or more double-words is selected until one is reached with the bit-pair 00 to obtain the address of a status load block. In the above, if the interrupt code is decremented, it is the decremented interrupt code which is used, if necessary, in connection with the next double-word, but if it is ANDed, it is the code before ANDing which is used. The status load block is used to initialize the system to execute the programme for dealing with the interrupt, after storing the current status data (relating to the interrupted programme) in a current programme status block (storage area), to enable subsequent resumption of the interrupted programme. A programme status block is obtained for the new programme, the address of this block being obtained from the head of the interrupt list which specifies the address of the first block of a free list of such blocks, each block in the list containing the address of the next so that they are chained together. The "first block" address in the interrupt list is then updated. While the interrupt list is being used by one processor, a lock byte and the identity of the processor are stored in it (the list) to prevent the other processor using it and to enable this processor to find out why use is prevented. The programme status block (which is loaded With status data for its programme when that programme is interrupted) holds interrupt masking bits, storage protection key (for comparison with a key associated with each block of storage to prevent access unless they are equal or one is zero), instruction length indicator, indication of conditions which will cause branch, next instruction address, indications of which local storage registers have had their contents saved (determined by the doubleword with bit-pair 00 referred to above), addresses of locations where various registers can be dumped in the event of an interrupt, the address of the programme status block of the previously running programme, class of interrupt, identity of processor to which the current interruption is related, interrupt code, and extended interrupt code giving more information on the interrupt. Provision is made for dealing with exhaustion of the free list. Conventional types of interrupt are described. The interrupt list, interrupt class lists and status load blocks are settable under control of a supervisor programme. Besides the two processors, the system includes two memories with a unified addressing scheme and the effective configuration of the system is controlled by configuration control data stored in the various units.
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.025 seconds)
