公开(公告)号：CA1030665A

公开(公告)日：1978-05-02

申请号：CA202290

申请日：1974-06-12

Applicant: IBM

Inventor： LECHATON JOHN S ,  RICHARD LEO P ,  SMITH DARYL C

IPC: H05K3/46 ,  H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L29/06 ,  H01L29/49 ,  H01L21/203

Abstract: 1418278 Sputter etching INTERNATIONAL BUSINESS MACHINES CORP 17 May 1974 [29 June 1973] 22230/74 Addition to 1361214 Heading C7F In the manufacture of an integrated circuit device, a Si substrate is formed with a layer of SiO 2 or Si 3 N 4 , 11, and metal strips 20, 22 to which is applied a sputtered coating of SiO 2 , 23. After deposition, or during deposition (see Figs. 2A 1 - 2C 1 ), the layer 23 is sputter-etched" until the raised portion 24 above the narrow strip 20 is removed to the overall level of the layer, whilst leaving raised portion 25 above the wider strip 22. A via hole is formed in layer 23 down to the strip 20 by using HF and a photo-resit 26, in which via hole a metal strip 30 is deposited. Finally, an overlayer of SiO 2 or Si 3 N 4 may be applied. The metal of strips 20, 22, 30 is selected from Al, Al-Cu, Pt, Pd, Cr, and Mo. The process may be used to selectively level the coating above a narrowed portion of a wide strip Figs.3 and 4; (not shown).

公开(公告)号：DE2430692A1

公开(公告)日：1975-01-16

申请号：DE2430692

申请日：1974-06-26

Applicant: IBM

Inventor： LECHATON JOHN S ,  RICHARD LEO PAUL ,  SMITH DARYL CLIFTON

IPC: H05K3/46 ,  H01L21/28 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L29/06 ,  H01L29/49 ,  H05K3/36 ,  H01L21/70

Abstract: 1418278 Sputter etching INTERNATIONAL BUSINESS MACHINES CORP 17 May 1974 [29 June 1973] 22230/74 Addition to 1361214 Heading C7F In the manufacture of an integrated circuit device, a Si substrate is formed with a layer of SiO 2 or Si 3 N 4 , 11, and metal strips 20, 22 to which is applied a sputtered coating of SiO 2 , 23. After deposition, or during deposition (see Figs. 2A 1 - 2C 1 ), the layer 23 is sputter-etched" until the raised portion 24 above the narrow strip 20 is removed to the overall level of the layer, whilst leaving raised portion 25 above the wider strip 22. A via hole is formed in layer 23 down to the strip 20 by using HF and a photo-resit 26, in which via hole a metal strip 30 is deposited. Finally, an overlayer of SiO 2 or Si 3 N 4 may be applied. The metal of strips 20, 22, 30 is selected from Al, Al-Cu, Pt, Pd, Cr, and Mo. The process may be used to selectively level the coating above a narrowed portion of a wide strip Figs.3 and 4; (not shown).