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公开(公告)号:DE60319229D1
公开(公告)日:2008-04-03
申请号:DE60319229
申请日:2003-06-13
Applicant: IBM
Inventor: MARMIGERE GERARD , PICON JOAQUIN , SECONDO PIERRE
Abstract: A computing system and computer readable medium storing computer instructions are disclosed, which when the computer instructions are executed, enables a computer system to manage data using a file name on a computer system having a graphical user interface and a file system storing files with a file hierarchy. The computer instructions comprise, in part, entering a command from an application to create a file; displaying the file hierarchy; allowing a user to select at least one folder; saving data in a first file having a file name in one selected folder; in each of the other selected folders, creating a shortcut file having the same file name and containing a pointer to the first file; and creating a hidden file in the folder containing the first file, the hidden file containing a list of pointers to the shortcut files.
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22.
公开(公告)号:AU2003246419A1
公开(公告)日:2004-01-06
申请号:AU2003246419
申请日:2003-05-13
Applicant: IBM FRANCE
Inventor: MARMIGERE GERARD , PICON JOAQUIN , SECONDO PIERRE
Abstract: A method and computing systems for refreshing, from a server, objects locally stored by a client device remotely connected through a communicating means to said server. The client device send a request for refresh message and a list of object identifiers and the digest of the object itself stored in its local storage. The server, after checking the deals the client device has subscribed to, sends back a refresh answer message with the objects stored locally in the client device and which needs to be refreshed. According to the deals to which the client device has subscribed, the server will also send new objects and will send a special code to specify to the client device to delete objects which are no more part of the deals.
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公开(公告)号:GB2525874A
公开(公告)日:2015-11-11
申请号:GB201408007
申请日:2014-05-07
Applicant: IBM
Inventor: OUDOT OLIVIER , PICON JOAQUIN , PUCCI BERNARD , AUBERT DENIS
IPC: G06F11/34
Abstract: Estimating computer processing metrics for a target computer product or target computer process, comprising a product name identifier for initiating execution of the method when a process requires a new memory page for a module and identifying a product associated with the module, a module page creator for creating a new memory page associated with the process and product, a module loader for loading the module into the new memory page as associated with the process and product, and wherein the total size of memory pages associated with a particular product can be determined. A computer processing metric maybe estimated for the process from memory page hit counts for the product and the size of the memory page associated with the product maybe used to estimate the memory usage for the product. A product name maybe identified with a module and a product identifier maybe associated with the product name.
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公开(公告)号:GB2519340A
公开(公告)日:2015-04-22
申请号:GB201318439
申请日:2013-10-18
Applicant: IBM
Inventor: BOUDINET FRANCK , PICON JOAQUIN , PUCCI BERNARD , AUBERT DENIS
Abstract: Disclosed is a virtual gateway for communicating between one or more remote machine to machine (M2M) capillary networks and a local base transceiver station (BTS). The virtual gateway comprising: an interface for communicating with a local base transceiver station, the interface emulating a Radio Link Control (RLC) protocol in said communication; an interface for communicating with one or more remote capillary networks; and a SIM emulation component for emulating a SIM card, the SIM card being used in association with the interface for communicating with the local BTS. The virtual gateway may be co-located with the local BTS, which allows the SIM emulation and associated chipset to be supplied from an existing power source.
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公开(公告)号:DE602006004494D1
公开(公告)日:2009-02-12
申请号:DE602006004494
申请日:2006-02-16
Applicant: IBM
Inventor: COMMAGNAC FRANCOIS , MESTRES JEAN CHRISTOPHE , PICON JOAQUIN , SECONDO PIERRE
Abstract: The present invention relates to a system for tamper detection. A tamper detection system in accordance with an embodiment of the present invention includes: a passive electronic sensor including a circuit having first, second, and third nodes; a load connected between the first and second nodes of the circuit; a friable electrical connection element connected between the second and third nodes of the circuit; and a storage unit, connected to the second node of the circuit, for storing an identification code of the sensor; wherein in use a voltage is applied across the first and third nodes of the circuit, and when the friable electrical connection element is intact, the second node of the circuit is at a first voltage, and when the friable electrical connection element is broken, the second node of the circuit is at a second voltage.
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26.
公开(公告)号:AU2003246419A8
公开(公告)日:2004-01-06
申请号:AU2003246419
申请日:2003-05-13
Applicant: IBM FRANCE
Inventor: MARMIGERE GERARD , PICON JOAQUIN , SECONDO PIERRE
Abstract: A method and computing systems for refreshing, from a server, objects locally stored by a client device remotely connected through a communicating means to said server. The client device send a request for refresh message and a list of object identifiers and the digest of the object itself stored in its local storage. The server, after checking the deals the client device has subscribed to, sends back a refresh answer message with the objects stored locally in the client device and which needs to be refreshed. According to the deals to which the client device has subscribed, the server will also send new objects and will send a special code to specify to the client device to delete objects which are no more part of the deals.
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公开(公告)号:CA1250665A
公开(公告)日:1989-02-28
申请号:CA506148
申请日:1986-04-09
Applicant: IBM
Inventor: PICON JOAQUIN , POIRAUD CLEMENT Y G , SAZBON-NATANSOHN DANIEL
Abstract: A method and associated addressing circuit for storing the control code of a processor in a read only memory (ROM) and in a read/write memory RAM comprising a code area and a patch area. It consists in virtually dividing the control code in blocks of n instructions, storing the first instruction of each block into the code area of the read/write memory, and storing the n-1 following instructions of each block in the read only memory ROM. When an error is detected in at least one block, the first instruction of said block normally stored in the read/write RAM, is replaced by a branch instruction containing a branch address value so as to point to the patch area where the corrected block is stored.
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