公开(公告)号：CA2800643C

公开(公告)日：2018-11-20

申请号：CA2800643

申请日：2010-11-08

Applicant: IBM

Inventor： SCHWARZ ERIC MARK ,  YEH PHIL ,  COWLISHAW MICHAEL FREDERIC ,  MUELLER SILVIA MELITTA

IPC: G06F9/302 ,  G06F7/491 ,  G06F7/499 ,  G06F9/38

Abstract: A system and method for detecting decimal floating point data processing exceptions. A processor accepts at least one decimal floating point operand and performs a decimal floating point operation on the at least one decimal floating point operand to produce a decimal floating point result. A determination is made as to whether the decimal floating point result fails to maintain a preferred quantum. The preferred quantum indicates a value represented by a least significant digit of a significand of the decimal floating point result. An output is provided, in response to the determining that the decimal floating point result fails to maintain the preferred quantum, indicating an occurrence of a quantum exception. A maskable exception can be generated that is immediately trapped or later detected to control conditional processing.

公开(公告)号：SI2769305T1

公开(公告)日：2018-09-28

申请号：SI201231340

申请日：2012-11-15

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN

IPC: G06F9/00

公开(公告)号：ES2637205T3

公开(公告)日：2017-10-11

申请号：ES10775821

申请日：2010-11-08

Applicant: IBM

Inventor： SCHWARZ ERIC MARK ,  YEH PHIL ,  COWLISHAW MICHAEL FREDERIC ,  MUELLER SILVIA MELITTA

IPC: G06F9/302 ,  G06F7/491 ,  G06F7/499 ,  G06F9/38

Abstract: Un método para detectar excepciones cuánticas decimales de coma flotante, comprendiendo el método los pasos de aceptar al menos un operando decimal (102, 104) de coma flotante; obtener (202) una instrucción de máquina que contiene una instrucción para una operación decimal de coma flotante; y caracterizado por: ejecutar la instrucción de máquina que comprende: determinar (208) la cuantía preferida basada en al menos un operando decimal de coma flotante, indicando la cuantía preferida un valor definido representado por un dígito menos significativo de un significando del resultado decimal de coma flotante; realizar (210) una operación decimal de coma flotante en al menos un operando decimal de coma flotante para producir un resultado decimal de coma flotante; determinar, en respuesta a un campo de control en la instrucción de máquina, que la cuantía del resultado decimal de coma flotante es diferente de la cuantía preferida; y proporcionar, en respuesta al paso de determinar que la cuantía del resultado decimal de coma flotante es diferente de la cuantía preferida, una salida que indica una excepción cuántica, ocurriendo la excepción cuántica solamente en respuesta a la cuantía del resultado decimal de coma flotante que es diferente de la cuantía preferida.

公开(公告)号：BR112014022725A2

公开(公告)日：2017-06-20

申请号：BR112014022725

申请日：2013-03-07

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  JACOBI CHRISTIAN

公开(公告)号：AU2013375139B2

公开(公告)日：2017-02-02

申请号：AU2013375139

申请日：2013-12-04

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SCHWARZ ERIC MARK

IPC: G06F9/30

Abstract: A Vector Checksum instruction. Elements from a second operand are added together one- by-one to obtain a first result. The adding includes performing one or more end around carry add operations. The first result is placed in an element of a first operand of the instruction. After each addition of an element, a carry out of a chosen position of the sum, if any, is added to a selected position in an element of the first operand.

公开(公告)号：MX340052B

公开(公告)日：2016-06-22

申请号：MX2015009458

申请日：2013-12-06

Applicant: IBM

Inventor： SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  BRADBURY JONATHAN DAVID ,  GSCHWIND MICHAEL KARL

IPC: G06F17/16

Abstract: Se facilita el manejo de la excepción del vector. Se ejecuta una instrucción vectorial que opera en uno o más elementos de un registro del vector. Cuando una excepción se encuentra durante la ejecución de la instrucción, se proporciona un código de excepción del vector, que indica una posición dentro del registro del vector que causó la excepción. El código de excepción del vector también incluye una razón para la excepción.

公开(公告)号：AU2013233993B2

公开(公告)日：2016-05-19

申请号：AU2013233993

申请日：2013-03-07

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  GSCHWIND MICHAEL KARL

IPC: G06F15/76 ,  G06F40/00

Abstract: Processing of character data is facilitated. A Find Element Equal instruction is provided that compares data of multiple vectors for equality and provides an indication of equality, if equality exists. An index associated with the equal element is stored in a target vector register. Further, the same instruction, the Find Element Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.

公开(公告)号：AU2012360181B2

公开(公告)日：2016-04-14

申请号：AU2012360181

申请日：2012-11-13

Applicant: IBM

Inventor： CARLOUGH STEVEN ,  SCHWARZ ERIC MARK ,  SLEGEL TIMOTHY ,  GAINEY JR CHARLES ,  MITRAN MARCEL ,  COPELAND REID

IPC: G06F9/30

Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.

公开(公告)号：ZA201400734B

公开(公告)日：2015-10-28

申请号：ZA201400734

申请日：2014-01-30

Applicant: IBM

Inventor： COPELAND REID ,  GAINEY JR CHARLES ,  SCHWARZ ERIC MARK ,  MITRAN MARCEL ,  SLEGEL TIMOTHY ,  CARLOUGH STEVEN

Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.

公开(公告)号：GB2525357A

公开(公告)日：2015-10-21

申请号：GB201514708

申请日：2013-11-21

Applicant: IBM

Inventor： BRADBURY JONATHAN DAVID ,  SLEGEL TIMOTHY ,  SCHWARZ ERIC MARK ,  ENENKEL ROBERT FREDERICK

IPC: G06F9/30

Abstract: A Vector Element Rotate and Insert Under Mask instruction. Each element of a second operand of the instruction is rotated in a specified direction by a specified number of bits. For each bit in a third operand of the instruction that is set to one, the corresponding bit of the rotated elements in the second operand replaces the corresponding bit in a first operand of the instruction.