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公开(公告)号：US11132761B2
公开(公告)日：2021-09-28
申请号：US16783878
申请日：2020-02-06
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis , Orr Goldman
Abstract: Embodiments are disclosed for emulation of graphics processing unit instructions. An example apparatus includes a kernel accessor to access an instruction of an original GPU kernel, the original GPU kernel intended to be executed at a first GPU. An instruction support determiner is to determine whether execution of the instruction is supported by a second GPU different from the first GPU. An instruction modifier is to, in response to determining that the execution of the instruction is not supported by the second GPU, create an instrumented GPU kernel based on the original GPU kernel. The instrumented GPU kernel includes an emulation sequence. The emulation sequence is to, when executed by the second GPU, cause the second GPU to emulate execution of the instruction by the first GPU.
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公开(公告)号：US20210225062A1
公开(公告)日：2021-07-22
申请号：US17223464
申请日：2021-04-06
Applicant: Intel Corporation
Inventor： Michael Apodaca , John Feit , David Cimini , Thomas Raoux , Konstantin Levit-Gurevich
IPC: G06T15/00
Abstract: An apparatus to facilitate an update of shader data constants. The apparatus includes one or more processors to detect a change to one or more data constants in a shader program, generate a micro-code block including updated constants data during execution of the shader program and transmit the micro-code block to the shader program.
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公开(公告)号：US10922779B2
公开(公告)日：2021-02-16
申请号：US16235304
申请日：2018-12-28
Applicant: INTEL CORPORATION
Inventor： Orr Goldman , Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis
Abstract: Techniques and apparatus for profiling graphics processing unit (GPU) processes using binary instrumentation are described. In one embodiment, for example, an apparatus may include at least one memory comprising instructions and a processor coupled to the at least one memory. The processor may execute the instructions to determine a plurality of profiling modes for profiling an operating process of a graphics processing unit (GPU) application, access original binary code for the GPU application, and generate a multi-mode instrumented binary code comprising a plurality of instrumentation modes, each of the plurality of instrumentation modes corresponding to at least one of the plurality of profiling modes. Other embodiments are described.
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24.发明申请公开(公告)号：US20200301708A1
公开(公告)日：2020-09-24
申请号：US16898189
申请日：2020-06-10
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Orr Goldman
Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes an entry point detector to detect a first entry point address and a second entry point address of an original GPU kernel, the first entry point address including a first entry point instruction, the second entry point address including a second entry point instruction. An instruction inserter is to create a corresponding instrumented GPU kernel from the original GPU kernel by inserting first profiling initialization instructions at a first address of the instrumented GPU kernel, the instruction inserter to insert profiling measurement instructions into the instrumented GPU kernel. An entry point adjuster is to adjust a list of entry points of the instrumented GPU kernel to replace the first entry point address with the first address and the second entry point address with the second address.
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公开(公告)号：US10209764B2
公开(公告)日：2019-02-19
申请号：US15385184
申请日：2016-12-20
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Gadi Haber
Abstract: Embodiments described herein relate to improving processor power-performance using a binary analyzer routine. In one example, a processor includes a memory interface to couple to a memory, at least one hardware accelerator circuit, and an execution pipeline including at least fetch, decode, and execute stages, wherein the processor, in response to a hot-spot hardware event indicating presence of a hot-spot sequence, is to switch context to a binary analyzer routine stored in the memory, the binary analyzer routine including instructions that, when fetched, decoded, and executed by the processor, cause the processor to analyze a region in the memory containing the hot-spot sequence, analyze hardware metrics relating to execution of the hot-spot sequence, and generate, based on the analyses, a recommendation for the at least one hardware accelerator circuit to improve at least one of power consumption and performance.
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Patent Agency Ranking
26.发明申请公开(公告)号：US20190042259A1
公开(公告)日：2019-02-07
申请号：US15998681
申请日：2018-08-15
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Orr Goldman
Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes an entry point detector to detect a first entry point address and a second entry point address of an original GPU kernel. An instruction inserter is to create a corresponding instrumented GPU kernel from the original GPU kernel by adding instructions of the original GPU kernel and one or more profiling instructions to the instrumented GPU kernel. The instruction inserter is to insert, at the first entry point address of the instrumented GPU kernel, a first jump instruction to jump to first profiling initialization instructions, the instruction inserter to insert, at the second entry point address of the instrumented GPU kernel, a second jump instruction to jump to second profiling initialization instructions. The instruction inserter is to insert profiling measurement instructions of the profiling instructions into the instrumented GPU kernel.
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公开(公告)号：US12106112B2
公开(公告)日：2024-10-01
申请号：US17111136
申请日：2020-12-03
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich
CPC classification number: G06F9/3836 , G06F9/30098 , G06F9/541 , G06T1/20
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to generate a graphics processing unit (GPU) long instruction trace (GLIT). An example apparatus includes at least one memory, and at least one processor to execute instructions to at least identify a first routine based on an identifier of a second routine executed by the GPU, the first routine based on an emulation of the second routine, execute the first routine to determine a first value of a GPU state of the GPU, the first routine having (i) a first argument associated with the second routine and (ii) a second argument corresponding to a second value of the GPU state prior to executing the first routine, and control a workload of the GPU based on the first value of the GPU state.
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28.发明申请公开(公告)号：US20210326140A1
公开(公告)日：2021-10-21
申请号：US17359114
申请日：2021-06-25
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Orr Goldman
Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes instructions, and at least one processor to execute the instructions to determine whether a GPU supports modification of entry point addresses, detect a first entry point address and a second entry point address of an original GPU kernel, create a corresponding instrumented GPU kernel from the original GPU kernel based on the determination by inserting at least one of first profiling initialization instructions or first jump instructions at the first entry point address of the instrumented GPU kernel, inserting at least one of second profiling initialization instructions or second jump instructions at the second entry point address of the instrumented GPU kernel, and inserting profiling measurement instructions into the instrumented GPU kernel.
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公开(公告)号：US11120521B2
公开(公告)日：2021-09-14
申请号：US16235257
申请日：2018-12-28
Applicant: INTEL CORPORATION
Inventor： Orr Goldman , Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis
Abstract: Techniques and apparatus for profiling graphics processing unit (GPU) processes using binary instrumentation are described. In one embodiment, for example, an apparatus may include at least one memory comprising instructions and a processor coupled to the at least one memory. The processor may execute the instructions to implement a profiling process to profile a graphics processing unit (GPU) application being executed via a GPU, the profiling process to perform an instrumentation phase to determine an operating process being executed via the GPU and to generate instrumented binary code for the operating process, perform an execution phase to collect profiling data for a command of the operating process, and perform a completion phase for a profiling application executed via the processor to read the profiling data. Other embodiments are described.
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公开(公告)号：US11093366B2
公开(公告)日：2021-08-17
申请号：US16553614
申请日：2019-08-28
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich
Abstract: Systems, methods, computer program products, and apparatuses to determine a count of trace records to be generated by each block of a plurality of blocks of an instrumented binary code to be executed on a graphics processor, each trace record to comprise a trace record type, the trace record types of a plurality of trace record types, determine a respective execution count for each of the plurality of blocks of the instrumented binary code to be executed on the graphics processor, and determine a respective size of each of a plurality of trace buffers to be allocated in memory based on the determined counts of trace records generated by each block and the execution count for each block, each trace buffer to store trace records of a respective one of the plurality of trace record types.
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