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1.发明授权公开(公告)号：US11775304B2
公开(公告)日：2023-10-03
申请号：US17359114
申请日：2021-06-25
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Orr Goldman
CPC classification number: G06F9/322 , G06F11/34 , G06F11/3466 , G06F11/3636 , G06T1/20
Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes instructions, and at least one processor to execute the instructions to determine whether a GPU supports modification of entry point addresses, detect a first entry point address and a second entry point address of an original GPU kernel, create a corresponding instrumented GPU kernel from the original GPU kernel based on the determination by inserting at least one of first profiling initialization instructions or first jump instructions at the first entry point address of the instrumented GPU kernel, inserting at least one of second profiling initialization instructions or second jump instructions at the second entry point address of the instrumented GPU kernel, and inserting profiling measurement instructions into the instrumented GPU kernel.
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2.发明公开公开(公告)号：US20230281104A1
公开(公告)日：2023-09-07
申请号：US18316866
申请日：2023-05-12
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Aleksey Alekseev , Michael Berezalsky , Sion Berkowits , Julia Fedorova , Anton V. Gorshkov , Sunpyo Hong , Noam Itzhaki , Arik Narkis
CPC classification number: G06F11/3612 , G06F11/3024 , G06F11/3409 , G06F11/3466 , G06F8/41
Abstract: Disclosed examples include generating instrumented code by inserting profiling instructions at insertion points in code; outputting the instrumented code for execution by second programmable circuitry; and accessing profiling data generated by the second programmable circuitry based on the instrumented code.
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公开(公告)号：US11650902B2
公开(公告)日：2023-05-16
申请号：US15806917
申请日：2017-11-08
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Aleksey Alekseev , Michael Berezalsky , Sion Berkowits , Julia Fedorova , Anton V. Gorshkov , Sunpyo Hong , Noam Itzhaki , Arik Narkis
CPC classification number: G06F11/3612 , G06F11/3024 , G06F11/3409 , G06F11/3466 , G06F8/41 , G06F2201/865
Abstract: Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.
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公开(公告)号：US10559057B2
公开(公告)日：2020-02-11
申请号：US16144290
申请日：2018-09-27
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis , Orr Goldman
Abstract: Embodiments are disclosed for emulation of graphics processing unit instructions. An example apparatus includes a kernel accessor to access an instruction of an original GPU kernel, the original GPU kernel intended to be executed at a first GPU. An instruction support determiner is to determine whether execution of the instruction is supported by a second GPU different from the first GPU. An instruction modifier is to, in response to determining that the execution of the instruction is not supported by the second GPU, create an instrumented GPU kernel based on the original GPU kernel. The instrumented GPU kernel includes an emulation sequence. The emulation sequence is to, when executed by the second GPU, cause the second GPU to emulate execution of the instruction by the first GPU.
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公开(公告)号：US20190043457A1
公开(公告)日：2019-02-07
申请号：US15971988
申请日：2018-05-04
Applicant: Intel Corporation
Inventor： Sunpyo Hong , Konstantin Levit-Gurevich , Michael Berezalsky , Arik Narkis , Noam Itzhaki
Abstract: An apparatus for generating dynamic trace data of binary code running on one or more execution units of a Graphics Processing Unit (GPU) though binary instrumentation is presented. In embodiments, the apparatus may include an input interface disposed in the GPU to receive instrumented binary code and communication data, and an output interface disposed in the GPU, and coupled to a memory of a computer hosting the GPU. In embodiments, the memory may be further coupled to the input interface and a Central Processing Unit (CPU) of the computer, the memory having a trace buffer and a control buffer, the control buffer including an overflow flag of the trace buffer. In embodiments, the apparatus may further include an execution unit (EU) disposed in the GPU and coupled to the input interface and to the output interface, to conditionally execute the instrumented binary code and generate dynamic trace data when the overflow flag is not set to indicate an overflow condition. In embodiments, if it is set, the overflow flag may be cleared by the CPU.
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Patent Agency Ranking
6.发明公开公开(公告)号：US20230418613A1
公开(公告)日：2023-12-28
申请号：US18463142
申请日：2023-09-07
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Orr Goldman
CPC classification number: G06F9/322 , G06T1/20 , G06F11/34 , G06F11/3636 , G06F11/3466
Abstract: Embodiments are disclosed for inserting profiling instructions into graphics processing unit (GPU) kernels. An example apparatus includes instructions, and at least one processor to execute the instructions to determine whether a GPU supports modification of entry point addresses, detect a first entry point address and a second entry point address of an original GPU kernel, create a corresponding instrumented GPU kernel from the original GPU kernel based on the determination by inserting at least one of first profiling initialization instructions or first jump instructions at the first entry point address of the instrumented GPU kernel, inserting at least one of second profiling initialization instructions or second jump instructions at the second entry point address of the instrumented GPU kernel, and inserting profiling measurement instructions into the instrumented GPU kernel.
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公开(公告)号：US20230109752A1
公开(公告)日：2023-04-13
申请号：US18064225
申请日：2022-12-09
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich
Abstract: At least one computer-readable storage medium comprising instructions for execution by at least one graphics processing unit (GPU) that, when executed, cause the at least one GPU to: obtain program code for tracing, the program code including a plurality of instructions; identify from the plurality of instructions of the program code events to be synchronized; instrument the program code corresponding to one or more of the events identified, by inserting instructions that support monitoring code; execute the instrumented program code on at least a plurality of hardware threads of the GPU and generate trace data; replay the identified events according to an order of occurrence of the events identified; and report a GPU state indicating a utilization of the GPU based; and wherein to report the GPU state includes to indicate when the GPU executes non-graphics related tasks.
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公开(公告)号：US20210192674A1
公开(公告)日：2021-06-24
申请号：US17096590
申请日：2020-11-12
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis , Orr Goldman
Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve operation of a graphics processing unit (GPU). An example apparatus includes an instruction generator to insert profiling instructions into a GPU kernel to generate an instrumented GPU kernel, the instrumented GPU kernel is to be executed by a GPU, a trace analyzer to generate an occupancy map associated with the GPU executing the instrumented GPU kernel, a parameter calculator to determine one or more operating parameters of the GPU based on the occupancy map, and a processor optimizer to invoke a GPU driver to adjust a workload of the GPU based on the one or more operating parameters.
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公开(公告)号：US20210117202A1
公开(公告)日：2021-04-22
申请号：US17111136
申请日：2020-12-03
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to generate a graphics processing unit (GPU) long instruction trace (GLIT). An example apparatus includes at least one memory, and at least one processor to execute instructions to at least identify a first routine based on an identifier of a second routine executed by the GPU, the first routine based on an emulation of the second routine, execute the first routine to determine a first value of a GPU state of the GPU, the first routine having (i) a first argument associated with the second routine and (ii) a second argument corresponding to a second value of the GPU state prior to executing the first routine, and control a workload of the GPU based on the first value of the GPU state.
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公开(公告)号：US20220012844A1
公开(公告)日：2022-01-13
申请号：US17484942
申请日：2021-09-24
Applicant: Intel Corporation
Inventor： Konstantin Levit-Gurevich , Michael Berezalsky , Noam Itzhaki , Arik Narkis , Orr Goldman
Abstract: Embodiments are disclosed for emulation of graphics processing unit instructions. An example method executing an instrumented kernel using a logic circuit, the instrumented kernel including an emulation sequence; saving, in response to determination that the emulation sequence is to be executed, source data to a shared memory; setting an emulation request flag to indicate to processor circuitry separate from the logic circuit that offloaded execution of the emulation sequence is to be executed; monitoring the emulation request flag to determine whether the offloaded execution of the emulation sequence is complete; and accessing resulting data from the shared memory.
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