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    24.
    发明专利
    未知

    公开(公告)号：DE69226746T2

    公开(公告)日：1999-01-14

    申请号：DE69226746

    申请日：1992-09-14

    Applicant: SGS THOMSON MICROELECTRONICS ,  MAGNETI MARELLI SPA

    Inventor： POLETTO VANNI ,  MORELLI MARCO ,  POMA ALBERTO

    IPC: H03K17/08 ,  H02M1/00 ,  H02M1/38 ,  H03K17/082 ,  H03K17/66 ,  H03K17/16

    Abstract: The circuit includes two output terminals (OUT1, OUT2) for connection to the terminals of a load (L), first and second pairs of electronic power switches (Q1, Q4; Q2, Q3) which are connected between the output terminals (OUT1, OUT2) and the two poles of a direct-current voltage supply (Vs) so as to form an H-shaped structure with the load (L), and a driver circuit (C1, C2) for selectively making the electronic power switches of the first pair (Q1, Q4) of the second pair (Q2, Q3) order to cause a current to flow through the load (L) in one direction or the other respectively, and for preventing the electronic switches (Q1, Q3; Q2, Q4) which are connected between the same output terminal (OUT1; OUT2) and the two poles of the voltage supply (Vs) from conducting simultaneously.

    29.
    发明专利
    未知

    公开(公告)号：DE3774252D1

    公开(公告)日：1991-12-05

    申请号：DE3774252

    申请日：1987-12-22

    Applicant: SGS THOMSON MICROELECTRONICS

    Inventor： POLETTO VANNI

    IPC: H03K3/02 ,  H03K3/284 ,  H03K5/04 ,  H03K17/28 ,  H03K17/60

    Abstract: A circuit, which may be monolithically integrated, for the generation of current pulses of extremely short duration comprises a differential input structure with first (T1) and second (T2) transistors of p-n-p type and third (T3), fourth (T4) and fifth (T5) transistors of n-p-n type. The emitter of the third transistor (T3) is connected to the negative pole (-Vcc) of a supply voltage generator via a first resistor (R1), to the emitter of the fourth transistor (T4) via a first diode (D1), and to the emitter of the fifth transistor (T5) via a second resistor (R2). The collector of the third transistor (T3) is connected to the collector of the second transistor (T2) and to the base of the fifth transistor (T5) via a second diode (D2), and to the base of the fourth transistor (T4). The base terminal of the third transistor (T3) is connected to the emitter of the fifth transistor (T5) via a third resistor (R3) and to the negative pole via a capacitor (C1). The collector of the fifth transistor (T5) is connected to the positive pole (+Vcc) of the supply voltage generator. The collector of the fourth transistor (T4) is an output terminal (OUT) of the circuit.

    30.
    发明专利
    未知

    公开(公告)号：ITMI910720D0

    公开(公告)日：1991-03-18

    申请号：ITMI910720

    申请日：1991-03-18

    Applicant: SGS THOMSON MICROELECTRONICS

    Inventor： BRAMBILLA MASSIMILIANO ,  POLETTO VANNI

    IPC: G05F3/26 ,  G01R1/28 ,  G05F3/30 ,  H02J

    Abstract: The generator of reference voltage comprises a first generator of current (1) suitable for generating a first current (I) that varies linearly with the supply voltage, a first generator of voltage (T10, T11, R4, R6, T6, T7, I3, T12) suitable for generating a constant first voltage (VBG) with zero thermal drift, a second generator of current (T10, T11, R4, R6, T6, T7, I3, T13, T14, T15, R5) suitable for generating a second current (I1) dependent on said voltage (VBG) with zero thermal drift, a second generator of voltage (T6, T7, T10, T11) suitable for generating a second voltage (DVBE) with given thermal drift, a third generator of current (T6, T7, T10, T11, T4, T5, T8, T9) suitable for generating a third current (I2) dependent on said voltage (DVBE) with given thermal drift and means (5) for combining said currents (I, I1, I2) together so as to produce across an output resistance (R7) an output voltage (Vout) having a value equal to the product of said output resistance (R7) by said first and third current (I, I2), divided by said second current (I1).

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