DETERMINATION OF RELIABILITY OF VEHICLE CONTROL COMMANDS VIA REDUNDANCY

    公开(公告)号:US20210046944A1

    公开(公告)日:2021-02-18

    申请号:US17089099

    申请日:2020-11-04

    Inventor: Gil Golov

    Abstract: A vehicle having a control element for the speed, acceleration or direction of the vehicle, two identical or redundant computing devices (e.g., each implemented as a system on chip (SoC)) to separately generate driving commands in parallel during autonomous driving of the vehicle, and a command controller coupled between the control element and the computing devices. In response to the commands from the identical or redundant computing devices, the command controller determines whether the commands are identical (or agree with each other); and if so, the command controller forwards one of the commands to the control element for execution. When there is a mismatch in the commands from the computing devices, the command controller tests the memories of the computing devices to identify a faulty one of the computing devices.

    Memory mapping for hibernation
    22.
    发明授权

    公开(公告)号:US10817423B2

    公开(公告)日:2020-10-27

    申请号:US16156835

    申请日:2018-10-10

    Inventor: Gil Golov

    Abstract: A computing system has a processing device (e.g., CPU, FPGA, or GPU) and memory regions (e.g., in a DRAM device) used by the processing device during normal operation. The computing system is configured to: monitor use of the memory regions in volatile memory; based on monitoring the use of the memory regions, identify at least one of the memory regions of the volatile memory; initiate a hibernation process; and during the hibernation process, copy data stored in the identified memory regions to non-volatile memory.

    Dynamic Memory Refresh Interval to Reduce Bandwidth Penalty

    公开(公告)号:US20190385666A1

    公开(公告)日:2019-12-19

    申请号:US16010211

    申请日:2018-06-15

    Inventor: Gil Golov

    Abstract: A dynamic memory system having multiple memory regions respectively storing multiple types of data. A controller coupled to the dynamic memory system via a communication channel and operatively to: monitor usage of a communication bandwidth of the communication channel; determine to reduce memory bandwidth penalty caused by refreshing the dynamic memory system; and in response, reduce a refresh rate of at least one of the memory regions based on a type of data stored in the respective memory region.

    Determination of Reliability of Vehicle Control Commands using a Voting Mechanism

    公开(公告)号:US20190193747A1

    公开(公告)日:2019-06-27

    申请号:US15855734

    申请日:2017-12-27

    Inventor: Gil Golov

    Abstract: A vehicle having a control element for the speed, acceleration or direction of the vehicle, multiple identical or redundant computing devices (e.g., each implemented as a system on chip (SoC)) to separately generate driving commands in parallel during autonomous driving of the vehicle, and a command controller coupled between the control element and the computing devices. The commands may have one or more matching groups, where commands within each respective group agree with each other and thus vote for a candidate command representing the group. The computing device outputs a candidate command that represents the largest group for execution by the control element.

    Determination of Reliability of Vehicle Control Commands via Redundancy

    公开(公告)号:US20190193746A1

    公开(公告)日:2019-06-27

    申请号:US15855451

    申请日:2017-12-27

    Inventor: Gil Golov

    CPC classification number: B60W50/0205 B60W2050/021 B60W2050/0215 G05D1/0088

    Abstract: A vehicle having a control element for the speed, acceleration or direction of the vehicle, two identical or redundant computing devices (e.g., each implemented as a system on chip (SoC)) to separately generate driving commands in parallel during autonomous driving of the vehicle, and a command controller coupled between the control element and the computing devices. In response to the commands from the identical or redundant computing devices, the command controller determines whether the commands are identical (or agree with each other); and if so, the command controller forwards one of the commands to the control element for execution. When there is a mismatch in the commands from the computing devices, the command controller tests the memories of the computing devices to identify a faulty one of the computing devices.

    RE-USING PROCESSING ELEMENTS OF AN ARTIFICIAL INTELLIGENCE PROCESSOR

    公开(公告)号:US20250165253A1

    公开(公告)日:2025-05-22

    申请号:US19023182

    申请日:2025-01-15

    Inventor: Gil Golov

    Abstract: The disclosed embodiments are directed toward improved control circuitry for artificial intelligence processors. In one embodiment, a device is disclosed comprising a processing element, the processing element including a processing device configured to receive a first set of vectors; a hijack control circuit, the hijack control circuit configured to replace the first set of vectors with a second set of vectors in response to detecting that the processing element is idle; and a processing element control circuit (PECC), the PECC storing a set of values representing the second set of vectors, the set of values retrieved from a remote data source.

    Black box data recorder for autonomous driving vehicle

    公开(公告)号:US12087110B2

    公开(公告)日:2024-09-10

    申请号:US18326984

    申请日:2023-05-31

    Inventor: Gil Golov

    CPC classification number: G07C5/085 H03M7/30 H03M7/70

    Abstract: An improved black box data recorder for use with autonomous driving vehicles (AVD). In one embodiment, two cyclic buffers are provided to record vehicle sensors data. A first cyclic buffer records raw vehicle sensor data on a volatile memory, while a second cyclic buffer records the same vehicle sensor data, as compressed data, on a non-volatile memory. In a case of a collision or near collision, in one embodiment the buffers are flushed into a non-volatile (NV) storage for retrieval. As long as there is no power interruption, the raw vehicle sensor data will be accessible from the NV storage. If a power interruption occurs, the raw vehicle sensor data held in the volatile memory of the first cyclic buffer will be lost and only the compressed form of the vehicle sensor data from the second cyclic buffer will survive and be accessible.

    MASTER SLAVE MANAGED MEMORY STORAGE
    29.
    发明公开

    公开(公告)号:US20240118825A1

    公开(公告)日:2024-04-11

    申请号:US18491685

    申请日:2023-10-20

    Inventor: Gil Golov

    Abstract: Systems, methods, and apparatus related to data storage devices. In one approach, a string of storage devices are chained together and coupled to a host device for storing data. Each storage device may, for example, execute read, write, or erase commands received from the host device. Each storage device in the chain is a master to the next storage device in the chain, and each storage device is a slave to the previous storage device in the chain. In one example, the host device is a system-on-chip. The chain can manage itself and is seen as a single large storage space to the host device. The host device does not require knowledge about each individual storage device, and each storage device does not require knowledge about the other storage devices in the chain (other than whether the storage device is attached to another storage device on its master port).

Patent Agency Ranking