公开(公告)号：US20170214553A1

公开(公告)日：2017-07-27

申请号：US15006794

申请日：2016-01-26

Applicant: NXP B.V.

Inventor： Massimo Ciacci ,  Ghiath Al-kadi ,  Remco Cornelis Herman van de Beek ,  Jos Verlinden

IPC: H04L25/03 ,  H04L27/34

CPC classification number: H04L25/03019 ,  H04L25/03343 ,  H04L27/34 ,  H04L27/368 ,  H04L2025/03726 ,  H04L2025/03802

Abstract: An apparatus includes an antenna that is configured to transmit a radio frequency signal across a transmission media having a channel response impairment. A transmission path includes an encoder circuit that encodes data on a carrier signal; and a pre-equalizer circuit that is configured to pre-distort the encoded data according to equalizer coefficients representing the channel response impairment. A first equalization path includes circuitry that generates the equalizer coefficients based upon transients resulting from a presence change event for the carrier signal. A second equalization path includes circuitry that generates the equalizer coefficients based upon knowledge of encoded data on the carrier signal. Selection circuitry selects between the first equalization path and the second equalization path.

公开(公告)号：US09379884B2

公开(公告)日：2016-06-28

申请号：US14702645

申请日：2015-05-01

Applicant: NXP B.V.

Inventor： Massimo Ciacci ,  Ghiath Al-kadi ,  Remco van de Beek

IPC: H04L7/00 ,  H04L7/027 ,  H04L7/033

CPC classification number: H04L7/0276 ,  H04L7/0012 ,  H04L7/0332 ,  H04L7/0334

Abstract: A symbol clock recovery circuit comprising an ADC, a controllable inverter and a timing detector. A timing detector input terminal is configured to receive an ADC output signal from an ADC output terminal; a timing detector output terminal is configured to provide a digital output signal; and a first timing detector feedback terminal is configured to provide a first feedback signal to the inverter control terminal. The timing detector is configured to determine an error signal associated with the received ADC output signal, and set the first feedback signal in accordance with the error signal.

Abstract translation: 一种符号时钟恢复电路，包括ADC，可控逆变器和定时检测器。 定时检测器输入端子被配置为从ADC输出端子接收ADC输出信号; 定时检测器输出端被配置为提供数字输出信号; 并且第一定时检测器反馈端子被配置为向所述逆变器控制端子提供第一反馈信号。 定时检测器被配置为确定与接收的ADC输出信号相关联的误差信号，并且根据误差信号设置第一反馈信号。

公开(公告)号：US09367787B2

公开(公告)日：2016-06-14

申请号：US14719781

申请日：2015-05-22

Applicant: NXP B.V.

Inventor： Ghiath Al-Kadi ,  Massimo Ciacci ,  Remco Cornelis Herman van de Beek

IPC: G06K19/07 ,  H04L1/20 ,  H04L1/00 ,  H04W4/00

CPC classification number: G06K19/0723 ,  G06K19/07 ,  H04L1/0053 ,  H04L1/0075 ,  H04L1/20 ,  H04W4/80 ,  Y02D70/166

Abstract: The invention proposes a smart card which comprises a digital signal processing receiver that can automatically identify the type of a smart card reader based on the error vector magnitude of signals received from the reader. The digital signal processing receiver is able to reconfigure itself at runtime in order to optimally minimize its power consumption in dependence on the type of reader it is communicating with. Furthermore, the invention proposes a new preamble structure that comprises a basic part and an optional additional part.

Abstract translation: 本发明提出了一种智能卡，其包括数字信号处理接收器，其可以基于从读取器接收的信号的误差向量大小自动识别智能卡读卡器的类型。 数字信号处理接收器能够在运行时重新配置自身，以便根据其正在通信的读取器的类型来最佳化其功耗。 此外，本发明提出了一种新的前导码结构，其包括基本部分和可选的附加部分。

公开(公告)号：US09124393B2

公开(公告)日：2015-09-01

申请号：US14136813

申请日：2013-12-20

Applicant: NXP B.V.

Inventor： Remco van de Beek ,  Massimo Ciacci ,  Ghiath Al-kadi

IPC: H04B5/00 ,  H04L5/12 ,  H04L27/22 ,  H04L1/00 ,  G06K19/067 ,  H04L7/04 ,  H04L27/227 ,  H04L27/00

CPC classification number: H04L1/0039 ,  G06K19/067 ,  H04B5/0031 ,  H04B5/0062 ,  H04B5/0093 ,  H04L5/001 ,  H04L7/041 ,  H04L7/042 ,  H04L27/22 ,  H04L27/227 ,  H04L27/2272 ,  H04L27/2273 ,  H04L2027/0036 ,  H04L2027/0057 ,  H04L2027/0095

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

Abstract translation: 公开了一种用于检测通信结束的装置。 该装置包括用于接收编码信号的接口电路和耦合到接口电路的输出的载波信号恢复电路。 载波信号恢复电路被配置为输出编码信号的载波信号和与载波信号异相的第二信号。 该装置还包括解码电路，其被配置为根据由载波信号恢复电路输出的编码信号和载波信号两者对编码信号进行解码。 该装置还包括检测电路，其被配置为根据编码信号和第二信号来检测编码信号中的通信结束的指示。

公开(公告)号：US20150180608A1

公开(公告)日：2015-06-25

申请号：US14136813

申请日：2013-12-20

Applicant: NXP B.V.

Inventor： Remco van de Beek ,  Massimo Ciacci ,  Ghiath Al-kadi

IPC: H04L1/00 ,  H04L27/22 ,  H04L27/227 ,  H04B5/00

CPC classification number: H04L1/0039 ,  G06K19/067 ,  H04B5/0031 ,  H04B5/0062 ,  H04B5/0093 ,  H04L5/001 ,  H04L7/041 ,  H04L7/042 ,  H04L27/22 ,  H04L27/227 ,  H04L27/2272 ,  H04L27/2273 ,  H04L2027/0036 ,  H04L2027/0057 ,  H04L2027/0095

Abstract: An apparatus for detecting the end of a communication is disclosed. The apparatus includes an interface circuit for receiving an encoded signal and a carrier signal recovery circuit coupled to an output of the interface circuit. The carrier signal recovery circuit is configured to output a carrier signal of the encoded signal and a second signal that is out of phase with the carrier signal. The apparatus also includes a decoding circuit configured to decode the encoded signal as a function of both the encoded signal and the carrier signal output by the carrier signal recovery circuit. The apparatus also includes a detection circuit configured to detect an indication of an end of a communication in the encoded signal as a function of both the encoded signal and the second signal.

公开(公告)号：US09008230B2

公开(公告)日：2015-04-14

申请号：US13736264

申请日：2013-01-08

Applicant: NXP B.V.

Inventor： Remco C. VandeBeek ,  Massimo Ciacci ,  Ghiath Al-kadi

IPC: H03D1/24 ,  H04L27/06 ,  H04B5/00

CPC classification number: H04L27/06 ,  H04B5/0031 ,  H04B5/0075

Abstract: In one embodiment, an apparatus is provided that includes a first circuit configured and arranged to provide a modulated carrier signal in response to a signal provided from the antenna. The modulated carrier signal conveys data using peaks or amplitudes of the carrier signal. A second circuit is configured to rectify the modulated carrier signal and integrate the rectified signal in response to a first clock signal. A third circuit is coupled to an output of the second circuit and is configured to sample the integrated signal values and provide therefrom a sample-based approximation of the modulated carrier signal.

Abstract translation: 在一个实施例中，提供一种装置，其包括配置和布置为响应于从天线提供的信号来提供调制载波信号的第一电路。 调制的载波信号使用载波信号的峰值或幅度来传送数据。 第二电路被配置为对已调制载波信号进行整流，并响应于第一时钟信号对经整流的信号进行积分。 第三电路耦合到第二电路的输出，并且被配置为对积分信号值进行采样，并从其提供调制载波信号的基于样本的近似。

公开(公告)号：US20140003484A1

公开(公告)日：2014-01-02

申请号：US13929670

申请日：2013-06-27

Applicant: NXP B.V.

Inventor： Remco Cornelis Herman van de Beek ,  Massimo Ciacci ,  Jos Verlinden ,  Ghiath Al-kadi

IPC: H04L25/03

CPC classification number: H04L25/03891 ,  H03F1/3241 ,  H03F3/195 ,  H03F3/24 ,  H04L25/03343 ,  H04L25/49 ,  H04L27/368

Abstract: A method for pre-equalizing a digital modulated RF signal is presented. The method comprises receiving an input stream of symbols (x(i)) representing a phase change and magnitude of an RF signal, the magnitudes of the symbols in the input stream are constant, the phase changes of the symbols in the input stream encode digital information, and adjusting the input stream of symbols to reduce inter-symbol interference in transmission of an RF signal modulated according to the input stream, thus obtaining an equalized stream of symbols (x′(i)), each symbol of the equalized stream representing a phase change and magnitude of an RF signal. The adjusting comprising iteratively determining a next symbol of the equalized stream (x′(n)) after receiving a next symbol of the input stream (x(n)) by multiplying said next symbol of the input stream (x(n)) with a next adjusting real number (a(n)), multiplying a previous symbol of the input stream (x(n−1)) with a previous adjusting real number (a(n−1)), said previous symbol being received directly before said next symbol of the input stream, and computing the next symbol of the equalized stream from the multiplied next symbol of the input stream and the multiplied previous symbol of the input stream.

Abstract translation: 提出了一种用于预均衡数字调制RF信号的方法。 该方法包括接收表示RF信号的相位变化和幅度的符号（x（i））的输入流，输入流中符号的大小是恒定的，输入流中符号的相位变化将数字 信息，并且调整输入符号流以减少根据输入流调制的RF信号的传输中的符号间干扰，从而获得均衡的符号流（x'（i）），所述均衡流的每个符号表示 RF信号的相位变化和幅度。 所述调整包括通过将所述输入流（x（n））的所述下一个符号与所述输入流（x（n））的所述下一个符号相乘而将所述输入流（x（n））的所述下一个符号与 下一个调整实数（a（n）），将输入流的先前符号（x（n-1））与先前的调整实数（a（n-1））相乘） 表示输入流的下一个符号，并从输入流的相乘的下一个符号和输入流的相乘的先前符号计算均衡流的下一个符号。