公开(公告)号：EP3513289A1

公开(公告)日：2019-07-24

申请号：EP17749093.5

申请日：2017-07-31

Applicant: QUALCOMM Incorporated

Inventor： ZHAO, Han ,  RAMAN, Arun ,  NATARAJAN, Aravind

IPC: G06F9/52 ,  G06F9/54 ,  H04N21/44

公开(公告)号：EP3350699A1

公开(公告)日：2018-07-25

申请号：EP16753561.6

申请日：2016-08-10

Applicant: Qualcomm Incorporated

Inventor： RAMAN, Arun

IPC: G06F9/48 ,  G06F9/50

CPC classification number: G06F9/52 ,  G06F9/4881 ,  G06F9/5038 ,  G06F9/5066

Abstract: Methods, devices, systems, and non-transitory process-readable storage media for a multi-processor computing device to schedule multi-versioned tasks on a plurality of processing units. An embodiment method may include processor-executable operations for enqueuing a specialized version of a multi-versioned task in a task queue for each of the plurality of processing units, wherein each specialized version is configured to be executed by a different processing unit of the plurality of processing units, providing ownership over the multi-versioned task to a first processing unit when the first processing unit is available to immediately execute a corresponding specialized version of the multi-versioned task, and discarding other specialized versions of the multi-versioned task in response to providing ownership over the multi-versioned task to the first processing unit. Various operations of the method may be performed via a runtime functionality.

公开(公告)号：EP3251007A1

公开(公告)日：2017-12-06

申请号：EP15820787.8

申请日：2015-12-17

Applicant: Qualcomm Incorporated

Inventor： RAMAN, Arun ,  ROBATMILI, Behnam

IPC: G06F9/48

CPC classification number: G06F9/52 ,  G06F9/4806 ,  G06F9/4881 ,  Y02D10/24

Abstract: A computing device (e.g., a mobile computing device, etc.) may be configured to may be configured to better exploit the concurrency and parallelism enabled by modern multiprocessor architectures by identifying a sequence of tasks via a task dependency controller, commencing execution of a first task in the sequence of tasks, and setting a value of a register so that each remaining task in the sequence of tasks executes after its predecessor task finishes execution without transferring control to a runtime system of the computing device. The task dependency controller may be a hardware component that is shared by the processor cores and/or otherwise configured to transfer control between tasks executing on different processor cores independent of the runtime system and/or without performing the relatively slow and memory-based inter-task, inter-thread or inter-process communications required by conventional solutions.

公开(公告)号：WO2018038846A1

公开(公告)日：2018-03-01

申请号：PCT/US2017/043648

申请日：2017-07-25

Applicant: QUALCOMM INCORPORATED

Inventor： RAMAN, Arun ,  ZHAO, Han ,  NATARAJAN, Aravind

IPC: G06F9/50

CPC classification number: G06F9/5027 ,  G06F9/5066 ,  G06F2209/5017

Abstract: Embodiments include computing devices, apparatus, and methods implemented by the apparatus for implementing speculative loop iteration partitioning (SLIP) for heterogeneous processing devices. A computing device may receive iteration information for a first partition of iterations of a repetitive process and select a SLIP heuristic based on available SLIP information and iteration information for the first partition. The computing device may determine a split value for the first partition using the SLIP heuristic, and partition the first partition using the split value to produce a plurality of next partitions.

Abstract translation: 实施例包括由用于实现异构处理设备的推测性循环迭代分割（SLIP）的设备实现的计算设备，装置和方法。 计算设备可以接收重复过程的迭代的第一分区的迭代信息，并且基于第一分区的可用SLIP信息和迭代信息来选择SLIP启发式。 计算设备可以使用SLIP启发式确定第一分区的分割值，并且使用分割值对第一分区进行分割以产生多个下一分区。

公开(公告)号：WO2017172205A1

公开(公告)日：2017-10-05

申请号：PCT/US2017/020164

申请日：2017-03-01

Applicant: QUALCOMM INCORPORATED

Inventor： SUAREZ GRACIA, Dario ,  CASCAVAL, Gheorghe ,  ZHAO, Han ,  KUMAR, Tushar ,  NATARAJAN, Aravind ,  RAMAN, Arun

IPC: G06F9/52

CPC classification number: G06F9/52 ,  G06F9/46

Abstract: Embodiments include computing devices, systems, and methods identifying enhanced synchronization operation outcomes. A computing device may receive a first resource access request for a first resource of a computing device including a first requester identifier from a first computing element of the computing device. The computing device may also receive a second resource access request for the first resource including a second requester identifier from a second computing element of the computing device. The computing device may grant the first computing element access to the first resource based on the first resource access request, and return a response to the second computing element including the first requester identifier as a winner computing element identifier.

Abstract translation: 实施例包括识别增强的同步操作结果的计算设备，系统和方法。 计算设备可以从计算设备的第一计算元件接收针对包括第一请求者标识符的计算设备的第一资源的第一资源访问请求。 计算设备还可以从计算设备的第二计算元件接收针对包括第二请求者标识符的第一资源的第二资源访问请求。 计算设备可以基于第一资源访问请求向第一计算元件授予对第一资源的访问权，并且向第二计算元件返回包括第一请求者标识符的响应作为获胜者计算元件标识符。

公开(公告)号：WO2017171994A1

公开(公告)日：2017-10-05

申请号：PCT/US2017/014715

申请日：2017-01-24

Applicant: QUALCOMM INCORPORATED

Inventor： KUMAR, Tushar ,  JIA, Wenhao ,  RAMAN, Arun ,  CHAO, Hui ,  RUAN, Wenjia

IPC: G06T3/40

Abstract: Various embodiments may include methods executed by processors of computing devices for geometry based work execution prioritization. The processor may receive events, such as images. The processor may overlay a boundary shape on the event to identify discard regions of the event lying outside the boundary shape. The processor may identify work regions of the events lying within the working boundary shape. The devices may determine a cancellation likelihood for each of the identified work regions of the events. The processor may assign a trimming weight to each of the identified work regions based on the determined cancellation likelihoods. The processor may then add each of the identified work regions as a work item to an execution work list in an order based on the assigned trimming weights. The work items may be processed in order of trimming weight priority.

Abstract translation: 各种实施例可以包括由用于基于几何的工作执行优先化的计算设备的处理器执行的方法。 处理器可能接收事件，如图像。 处理器可以在事件上覆盖边界形状以识别位于边界形状之外的事件的丢弃区域。 处理器可以识别位于工作边界形状内的事件的工作区域。 设备可以确定事件的每个识别的工作区域的消除可能性。 处理器可以基于确定的消除可能性向每个所识别的工作区域分配修剪权重。 处理器然后可以基于所分配的修剪权重将每个所识别的工作区域作为工作项目添加到执行工作列表中。 工作项目可以按照修剪重量优先顺序进行处理。

公开(公告)号：WO2017065915A1

公开(公告)日：2017-04-20

申请号：PCT/US2016/051739

申请日：2016-09-14

Applicant: QUALCOMM INCORPORATED

Inventor： RAMAN, Arun ,  KUMAR, Tushar

IPC: G06F9/48

CPC classification number: G06F9/52 ,  G06F9/4881 ,  G06F17/30424 ,  G06F17/30958

Abstract: Embodiments include computing devices, apparatus, and methods implemented by a computing device for accelerating execution of a plurality of tasks belonging to a common property task graph. The computing device may identify a first successor task dependent upon a bundled task such that an available synchronization mechanism is a common property for the bundled task and the first successor task, and such that the first successor task only depends upon predecessor tasks for which the available synchronization mechanism is a common property. The computing device may add the first successor task to a common property task graph and add the plurality of tasks belonging to the common property task graph to a ready queue. The computing device may recursively identify successor tasks. The synchronization mechanism may include a synchronization mechanism for control logic flow or a synchronization mechanism for data access.

Abstract translation: 实施例包括由计算设备实现的用于加速属于公共属性任务图的多个任务的执行的计算设备，装置和方法。 计算设备可以根据捆绑任务来识别第一后继任务，使得可用同步机制是捆绑任务和第一后继任务的公共属性，并且使得第一后继任务仅取决于可用的前任任务 同步机制是一个共同的属性。 计算设备可以将第一后继任务添加到公共属性任务图并且将属于公共属性任务图的多个任务添加到就绪队列。 计算设备可以递归地识别后续任务。 同步机制可以包括用于控制逻辑流程的同步机制或用于数据访问的同步机制。

公开(公告)号：WO2017048420A1

公开(公告)日：2017-03-23

申请号：PCT/US2016/046385

申请日：2016-08-10

Applicant: QUALCOMM INCORPORATED

Inventor： RAMAN, Arun

IPC: G06F9/48 ,  G06F9/50

CPC classification number: G06F9/52 ,  G06F9/4881 ,  G06F9/5038 ,  G06F9/5066

Abstract: Methods, devices, systems, and non-transitory process-readable storage media for a multi-processor computing device to schedule multi-versioned tasks on a plurality of processing units. An embodiment method may include processor-executable operations for enqueuing a specialized version of a multi-versioned task in a task queue for each of the plurality of processing units, wherein each specialized version is configured to be executed by a different processing unit of the plurality of processing units, providing ownership over the multi-versioned task to a first processing unit when the first processing unit is available to immediately execute a corresponding specialized version of the multi-versioned task, and discarding other specialized versions of the multi-versioned task in response to providing ownership over the multi-versioned task to the first processing unit. Various operations of the method may be performed via a runtime functionality.

Abstract translation: 用于多处理器计算设备在多个处理单元上调度多版本任务的方法，设备，系统和非暂时过程可读存储介质。 实施例方法可以包括用于对多个处理单元中的每一个的任务队列中的多版本任务的专门版本进行排队的处理器可执行操作，其中每个专用版本被配置为由多个处理单元中的不同处理单元执行 的处理单元，当第一处理单元可用于立即执行相应的多版本任务的专门版本时，将多版本任务的所有权提供给第一处理单元，并且丢弃多版本任务的其他专门版本 响应将多版本任务的所有权提供给第一处理单元。 该方法的各种操作可以经由运行时功能来执行。

公开(公告)号：WO2016160169A1

公开(公告)日：2016-10-06

申请号：PCT/US2016/018651

申请日：2016-02-19

Applicant: QUALCOMM INCORPORATED

Inventor： ROBATMILI, Behnam ,  AGA, Shaizeen, Dilawarhusen ,  SUAREZ GARCIA, Dario ,  RAMAN, Arun ,  NATARAJAN, Aravind ,  CASCAVAL, Gheorghe, Calin ,  MONTESINOS ORTEGO, Pablo ,  ZHAO, Han

IPC: G06F9/50

CPC classification number: G06F9/5066 ,  G06F9/5027

Abstract: Embodiments include computing devices, systems, and methods for task-based handling of repetitive processes in parallel. At least one processor of the computing device, or a specialized hardware controller, may be configured to partition iterations of a repetitive process and assign the partitions to initialized tasks to be executed in parallel by a plurality of processor cores. Upon completing a task, remaining divisible partitions of the repetitive process of ongoing tasks may be subpartitioned and assigned to the ongoing task, and the completed task or a newly initialized task. Information about the iteration space for a repetitive process may be stored in a descriptor table, and status information for all partitions of a repetitive process stored in a status table. Each processor core may have an associated local table that tracks iteration execution of each task, and is synchronized with the status table.

Abstract translation: 实施例包括用于并行地重复处理的基于任务的处理的计算设备，系统和方法。 计算设备的至少一个处理器或专用硬件控制器可以被配置为分区重复过程的迭代，并且将分区分配给由多个处理器核并行执行的初始化任务。 完成任务后，正在执行的任务的重复进程的剩余可分区可以被分分区并分配给正在进行的任务，以及完成的任务或新初始化的任务。 关于重复过程的迭代空间的信息可以存储在描述符表中，以及存储在状态表中的重复进程的所有分区的状态信息。 每个处理器核心可以具有跟踪每个任务的迭代执行的相关联的本地表，并且与状态表同步。

公开(公告)号：WO2016122798A1

公开(公告)日：2016-08-04

申请号：PCT/US2015/066422

申请日：2015-12-17

Applicant: QUALCOMM INCORPORATED

Inventor： RAMAN, Arun ,  ROBATMILI, Behnam

IPC: G06F9/48

CPC classification number: G06F9/52 ,  G06F9/4806 ,  G06F9/4881 ,  Y02D10/24

Abstract: A computing device (e.g., a mobile computing device, etc.) may be configured to may be configured to better exploit the concurrency and parallelism enabled by modern multiprocessor architectures by identifying a sequence of tasks via a task dependency controller, commencing execution of a first task in the sequence of tasks, and setting a value of a register so that each remaining task in the sequence of tasks executes after its predecessor task finishes execution without transferring control to a runtime system of the computing device. The task dependency controller may be a hardware component that is shared by the processor cores and/or otherwise configured to transfer control between tasks executing on different processor cores independent of the runtime system and/or without performing the relatively slow and memory- based inter-task, inter-thread or inter-process communications required by conventional solutions.

Abstract translation: 计算设备（例如，移动计算设备等）可以被配置为可以被配置为通过经由任务依赖性控制器识别任务序列来更好地利用现代多处理器架构实现的并发性和并行性，开始执行第一 任务序列中的任务，以及设置寄存器的值，使得任务序列中的每个剩余任务在其前任任务完成执行之后执行，而不将控制转移到计算设备的运行时系统。 任务依赖控制器可以是由处理器核共享的硬件组件和/或以其他方式被配置成在独立于运行时系统的不同处理器核上执行的任务之间传送控制和/或不执行相对较慢和基于存储器的间隔 常规解决方案所需的任务，线程间或进程间通信。