公开(公告)号：EP2759058A1

公开(公告)日：2014-07-30

申请号：EP12775368.9

申请日：2012-09-24

Applicant: Qualcomm Incorporated

Inventor： ZUO, Chengjie ,  LO, Chi Shun ,  JOO, Sanghoon ,  YUN, Changhan ,  KIM, Jonghae

IPC: H03H9/56 ,  H03H9/02

CPC classification number: H03H9/02157 ,  H03H9/02062 ,  H03H9/56

Abstract: A method and apparatus for a piezoelectric resonator (200) having combined thickness (220T) and width (220W) vibrational modes are disclosed. A piezoelectric resonator may include a piezoelectric substrate (210) and a first electrode (205) coupled to a first surface of the piezoelectric substrate. The piezoelectric resonator may further include a second electrode (215) coupled to a second surface of the piezoelectric substrate, where the first surface and the second surface are substantially parallel and define a thickness dimension of the piezoelectric substrate. Furthermore, the thickness dimension (T) and the width (W) dimension of the piezoelectric substrate are configured to produce a resonance from a coherent combination of a thickness vibrational mode and a width vibrational mode when an excitation signal is applied to the electrodes.

公开(公告)号：EP3459174B1

公开(公告)日：2020-07-15

申请号：EP17721281.8

申请日：2017-04-21

Applicant: Qualcomm Incorporated

Inventor： YUN, Changhan Hobie ,  KIM, Daeik Daniel ,  KIM, Jonghae ,  VELEZ, Mario Francisco ,  ZUO, Chengjie ,  BERDY, David Francis

IPC: H03H7/01 ,  H01L49/02 ,  H03H1/00 ,  H01L23/498

公开(公告)号：EP3403278A1

公开(公告)日：2018-11-21

申请号：EP16819739.0

申请日：2016-11-29

Applicant: Qualcomm Incorporated

Inventor： GU, Shiqun ,  ZUO, Chengjie ,  FANELLI, Steve ,  GEE, Thomas ,  SONG, Young Kyu

IPC: H01L23/66 ,  H01L21/768 ,  H01L23/522 ,  H01L49/02

CPC classification number: H04B1/48 ,  H01L21/76251 ,  H01L21/76898 ,  H01L21/84 ,  H01L23/481 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/60 ,  H01L23/66 ,  H01L27/1203 ,  H01L28/00 ,  H01L28/10 ,  H01L28/60 ,  H01L29/0649 ,  H01L2223/6672 ,  H01L2223/6677

Abstract: An integrated radio frequency (RF) circuit structure may include a resistive substrate material and a switch. The switch may be arranged in a silicon on insulator (SOI) layer supported by the resistive substrate material. The integrated RF circuit structure may also include an isolation layer coupled to the SOI layer. The integrated RF circuit structure may further include a filter, composed of inductors and capacitors. The filter may be arranged on a surface of the integrated RF circuit structure, opposite the resistive substrate material. In addition, the switch may be arranged on a first surface of the isolation layer.

公开(公告)号：EP3371827A1

公开(公告)日：2018-09-12

申请号：EP16797704.0

申请日：2016-11-08

Applicant: Qualcomm Incorporated

Inventor： VELEZ, Mario Francisco ,  MUDAKATTE, Niranjan Sunil ,  YUN, Changhan Hobie ,  KIM, Daeik Daniel ,  BERDY, David Francis ,  KIM, Jonghae ,  MA, Yunfei ,  ZUO, Chengjie

IPC: H01L23/522 ,  H01F17/04 ,  H01L23/64

CPC classification number: H01F27/2823 ,  H01F27/022 ,  H01F27/2828 ,  H01F27/29 ,  H01F38/14 ,  H01F41/06 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/3157 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/16 ,  H01L28/00 ,  H01L28/10 ,  H01L2223/6677 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/08265 ,  H01L2224/16227 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/4813 ,  H01L2224/73257 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16235 ,  H01L2924/19042 ,  H01L2924/19104 ,  H04B5/0037 ,  H04B5/0081 ,  H01L2224/05599 ,  H01L2924/20751 ,  H01L2224/85399

Abstract: An inductor with multiple loops and semiconductor devices with such an inductor integrated thereon are proposed. In an aspect, the semiconductor device may include a die on a substrate, an inductor on the die in which the inductor comprises a wire with multiple non-planar loops above the die. In another aspect, the semiconductor device may include a plurality of posts on a die on a substrate, and an inductor on the die. The inductor may include a wire looped around the plurality of posts such that the inductor includes multiple non-planar loops.

公开(公告)号：EP3350832A1

公开(公告)日：2018-07-25

申请号：EP16756829.4

申请日：2016-07-29

Applicant: Qualcomm Incorporated

Inventor： LAN, Je-Hsiung Jeffrey ,  MUDAKATTE, Niranjan Sunil ,  YUN, Changhan Hobie ,  KIM, Daeik Daniel ,  ZUO, Chengjie ,  BERDY, David Francis ,  VELEZ, Mario Francisco ,  KIM, Jonghae

IPC: H01L23/522

CPC classification number: H01L27/01 ,  H01L21/4846 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/75 ,  H01L2224/11

Abstract: A device includes a glass substrate and a capacitor. The capacitor includes a first metal coupled to a first electrode, a dielectric structure, and a via structure comprising a second electrode of the capacitor. The first metal structure is separated from the via structure by the dielectric structure.

公开(公告)号：EP3350831A1

公开(公告)日：2018-07-25

申请号：EP16774603.1

申请日：2016-09-20

Applicant: Qualcomm Incorporated

Inventor： VELEZ, Mario Francisco ,  BERDY, David Francis ,  YUN, Changhan Hobie ,  KIM, Jonghae ,  ZUO, Chengjie ,  KIM, Daeik Daniel ,  LAN, Je-Hsiung Jeffrey ,  MUDAKATTE, Niranjan Sunil ,  MIKULKA, Robert Paul

IPC: H01L23/498

CPC classification number: H01L24/17 ,  H01L23/13 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/09 ,  H01L24/11 ,  H01L2224/023 ,  H01L2224/0905

Abstract: An integrated circuit device in a wafer level package (WLP) includes ball grid array (BGA) balls fabricated with cavities filled with adhesives for improved solder joint reliability.

公开(公告)号：EP3123485A1

公开(公告)日：2017-02-01

申请号：EP15714139.1

申请日：2015-03-20

Applicant: QUALCOMM Incorporated

Inventor： ZUO, Chengjie ,  KIM, Jonghae ,  KIM, Daeik Daniel ,  YUN, Changhan Hobie ,  VELEZ, Mario Francisco

IPC: H01F17/00

CPC classification number: H01L28/10 ,  H01F17/0013 ,  H01F27/2804 ,  H01F2017/002 ,  H01L21/486 ,  H01L21/4889 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49866 ,  H01L24/17 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/19011 ,  H01L2924/19042 ,  H01L2924/19102

Abstract: Base pads are spaced by a pitch on a support surface. Conducting members, optionally Cu or other metal pillars, extend up from the base pads to top pads. A top pad interconnector connects the top pads in a configuration establishing an inductor current path between the base pads.

Abstract translation: 基座在支撑表面上以间距隔开。 导电构件，可选择Cu或其他金属柱，从基垫向上延伸到顶部焊盘。 顶部焊盘互连器以配置在基板之间建立电感器电流路径的配置连接顶部焊盘。

公开(公告)号：EP3039693A1

公开(公告)日：2016-07-06

申请号：EP14755473.7

申请日：2014-07-29

Applicant: Qualcomm Incorporated

Inventor： KIM, Daeik Daniel ,  ZUO, Chengjie ,  YUN, Changhan Hobie ,  VELEZ, Mario Francisco ,  MIKULKA, Robert Paul ,  ZHANG, Xiangdong ,  KIM, Jonghae ,  LAN, Je-Hsiung

IPC: H01F17/00

CPC classification number: H01F41/041 ,  H01F17/0013 ,  H01F27/2804 ,  H01F41/042 ,  H01F2017/0053 ,  H01F2017/0073 ,  H01F2027/2809

Abstract: A particular device includes a substrate and a spiral inductor coupled to the substrate. The spiral inductor includes a first conductive spiral and a second conductive spiral overlaying the first conductive spiral. A first portion of an innermost turn of the spiral inductor has a first thickness in a direction perpendicular to the substrate. The first portion of the innermost turn includes a first portion of the first conductive spiral and does not include the second conductive spiral. A second portion of the innermost turn includes a first portion of the second conductive spiral. A portion of an outermost turn of the spiral inductor has a second thickness in the direction perpendicular to the substrate that is greater than the first thickness. A portion of the outermost turn includes a second portion of the first conductive spiral and a second portion of the second conductive spiral.

Abstract translation: 特定的器件包括衬底和耦合到衬底的螺旋电感器。 螺旋电感器包括覆盖第一导电螺旋的第一导电螺旋和第二导电螺旋。 螺旋电感器的最内圈的第一部分在垂直于衬底的方向上具有第一厚度。 最内圈的第一部分包括第一导电螺旋的第一部分，并且不包括第二导电螺旋。 最内圈的第二部分包括第二导电螺旋的第一部分。 螺旋电感器的最外圈的一部分在垂直于衬底的方向上具有大于第一厚度的第二厚度。 最外圈的一部分包括第一导电螺旋的第二部分和第二导电螺旋的第二部分。

公开(公告)号：EP2944027A2

公开(公告)日：2015-11-18

申请号：EP14703660.2

申请日：2014-01-13

Applicant: Qualcomm Incorporated

Inventor： ZUO, Chengjie ,  KIM, Jonghae ,  VELEZ, Mario Francisco ,  LAN, Je-Hsiung ,  KIM, Daeik ,  YUN, Changhan ,  BERDY, David F ,  MIKULKA, Robert P. ,  NORWAK, Matthew M. ,  ZHANG, Xiangdong ,  SEE, Puay H

IPC: H03H7/46 ,  H01F17/00 ,  H01L23/15 ,  H01L23/498 ,  H01L23/64 ,  H05K1/16 ,  H03H1/00

CPC classification number: H03H7/461 ,  H01F2017/0026 ,  H01F2017/004 ,  H01L23/15 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/5223 ,  H01L23/5227 ,  H01L23/64 ,  H01L23/66 ,  H01L2924/0002 ,  H03H3/00 ,  H03H7/1758 ,  H03H7/1766 ,  H03H7/1791 ,  H03H7/463 ,  H03H2001/0021 ,  H05K1/0233 ,  H05K1/0306 ,  H05K1/165 ,  H05K2201/09627 ,  H05K2201/09672 ,  H05K2201/10015 ,  H05K2201/10098 ,  Y10T29/49128 ,  H01L2924/00

Abstract: A diplexer includes a substrate having a set of through substrate vias. The diplexer also includes a first set of traces on a first surface of the substrate. The first traces are coupled to the through substrate vias. The diplexer further includes a second set of traces on a second surface of the substrate that is opposite the first surface. The second traces are coupled to opposite ends of the set of through substrate vias. The through substrate vias and the traces also operate as a 3D inductor. The diplexer also includes a capacitor supported by the substrate.

公开(公告)号：EP2815504A1

公开(公告)日：2014-12-24

申请号：EP13709600.4

申请日：2013-02-11

Applicant: Qualcomm Incorporated

Inventor： YUN, Changhan ,  ZUO, Chengjie ,  LO, Chi Shun ,  KIM, Jonghae ,  VELEZ, Mario F.

IPC: H03H7/01 ,  H03H7/09

CPC classification number: H03H7/0115 ,  H01F17/0013 ,  H01F17/0033 ,  H01F2017/0026 ,  H01F2017/004 ,  H03H7/09 ,  H03H7/1708 ,  H03H7/1766 ,  H03H7/1775 ,  H03H7/1783 ,  H03H2001/0085 ,  Y10T29/4913

Abstract: Three-dimensional (3D) Radio Frequency (RF) inductor-capacitor (LC) band pass filters having through-glass-vias (TGVs). One such L-C filter circuit includes a glass substrate, a first portion of a first inductor formed on a first surface of the glass substrate, a second portion of the first inductor formed on a second surface of the glass substrate, and a first set of TGVs configured to connect the first and second portions of the first inductor. Additionally the L-C filter circuit can include a second inductor similar to the first inductor, and a metal-insulator-metal (MIM) capacitor formed between the first and second inductor, such that the first and second inductor are coupled through the MIM capacitor.

Abstract translation: 具有贯穿玻璃通孔（TGV）的三维（3D）射频（RF）电感电容（LC）带通滤波器。 一种这样的LC滤波器电路包括玻璃基板，在玻璃基板的第一表面上形成的第一电感器的第一部分，在玻璃基板的第二表面上形成的第一电感器的第二部分，以及第一组TGV 被配置为连接第一电感器的第一部分和第二部分。 另外，L-C滤波器电路可以包括与第一电感器类似的第二电感器以及形成在第一电感器和第二电感器之间的金属 - 绝缘体 - 金属（MIM）电容器，使得第一电感器和第二电感器通过MIM电容器耦合。