22.
    发明专利
    未知

    公开(公告)号:IT8922474D0

    公开(公告)日:1989-11-22

    申请号:IT2247489

    申请日:1989-11-22

    Abstract: An electronic comparator circuit (1), of a type which comprises a first, differential stage (2) input circuit portion provided with a differential pair of bipolar transistors (T2,T3) forming respective outputs of thee input portion (2), is further provided with an output stage (3) comprising a first pair of MOS transistors (M1,M2), with gate electrodes (G1,G2) in common, respectively connected on the one side to said outputs (C2,C3) and on the other side to a positive supply pole (Vc) via a current mirror circuit, and a second pair of MOS transistors (M5,M6), with gate electrodes (G5,G6) in common, connected between said outputs (C2,C3) and ground. A drain electrode (D2) of the first pair of MOS transistors (M1,M2) forms an output (OUT) for the comparator (1), the latter having shown itself to be specially fast during the switch phase and combining the advantages of bipolar technology circuits and of those in the CMOS technology.

    23.
    发明专利
    未知

    公开(公告)号:IT8922334D0

    公开(公告)日:1989-11-10

    申请号:IT2233489

    申请日:1989-11-10

    Inventor: GOLA ALBERTO

    Abstract: A circuit device (1) for verifying the operative condition and integrity of a data transmission line (5), connected between a central computer (CPU) and a peripheral unit, of the type comprising a window comparator (8) having respective inputs connected to the line (5) and an output (D) directly connected to the central computer for emitting an alarm signal upon occurrence of a fault state on the transmission line, furthermore comprising a resistor (Rin) connecting the terminals of the window comparator (8) input. Corresponding current generators (I1, I2) are connected to respective opposite ends of the resistor (Rin), for injecting on them a predetermined value (I) of current preventing the commutation of the comparator (8) in the presence of spurious signals on the line (5).

    24.
    发明专利
    未知

    公开(公告)号:DE69018362T2

    公开(公告)日:1995-11-23

    申请号:DE69018362

    申请日:1990-10-04

    Abstract: A negative overvoltage protection circuit for stages having a transistor with collector output and with the emitter connected to a reference voltage line; a diode (D1) for protection against negative overvoltages present on the output (Vout) is arranged between the collector and the output of the stage. In order to give the output of the stage a presettable minimum voltage level, the reference voltage line is set to a preset voltage which differs from the ground voltage. For this purpose, the circuit comprises an operational amplifier (Op) in a voltage-follower configuration, the output whereof is connected to the reference voltage line, a diode (D2) which is connected between the ground and the non-inverting terminal of the operational amplifier (Op), and a current source which is connected between the non-inverting input of the operational amplifier (Op) and a negative supply line (-VEE).

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