公开(公告)号：JP2006147679A

公开(公告)日：2006-06-08

申请号：JP2004332754

申请日：2004-11-17

Applicant: Sony Corp ,  ソニー株式会社

Inventor： OKUYAMA HIROYUKI ,  BIWA TSUYOSHI ,  KOJIMA SHIGERU ,  OHATA TOYOJI

IPC: H01L33/06 ,  H01L33/08 ,  H01L33/32 ,  H01L33/56 ,  H01L33/62 ,  H01L33/64

CPC classification number: H01L2224/48091 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide an integrated light emitting diode for remarkably reducing thermal resistance.
SOLUTION: After an n-type GaN layer 15, an active layer 16, and a p-type GaN layer 17 are sequentially formed on a substrate, and a circular p-side electrode 18 is formed on this p-type GaN layer 17; a fine light emitting diode in size of 20 μm or less is formed by etching the n-type GaN layer 15, active layer 16, and p-type GaN layer 17 using the p-side electrode 18 as the mask. Next, the conductive layer 21 of a semiconductor substrate 20 which is used as a heat sink is adhered on the p-side electrode 18 of such fine light emitting diode. Next, after separation of the substrate, an n-side electrode 22 formed of a transparent electrode is formed on the n-type GaN layer 15 of the fine light emitting diode. Thereafter, the semiconductor substrate 20 where the fine light emitting diode is formed is provided as a chip to obtain an integrated light emitting diode.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供用于显着降低热阻的集成发光二极管。 解决方案：在基板上依次形成n型GaN层15，有源层16和p型GaN层17之后，在该p型GaN上形成圆形p侧电极18 层17; 通过使用p侧电极18作为掩模蚀刻n型GaN层15，有源层16和p型GaN层17，形成尺寸为20μm以下的精细发光二极管。 接下来，将用作散热器的半导体衬底20的导电层21粘附在这种精细发光二极管的p侧电极18上。 接下来，在分离基板之后，在精细发光二极管的n型GaN层15上形成由透明电极形成的n侧电极22。 此后，将形成精细发光二极管的半导体基板20设置为芯片以获得集成发光二极管。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004117911A

公开(公告)日：2004-04-15

申请号：JP2002281884

申请日：2002-09-26

Applicant: Sony Corp ,  ソニー株式会社

Inventor： WADA HARUAKI ,  SUZUKI YOSHIO ,  KOJIMA SHIGERU

IPC: G09G3/291 ,  G09G3/20 ,  G09G3/288 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  H01J11/12 ,  H01J11/24 ,  H01J11/26 ,  H01J11/44 ,  G09G3/28

Abstract: PROBLEM TO BE SOLVED: To prevent display flickering and to reduce unwanted radiation noise.
SOLUTION: Panel inflow/outflow current during sustained discharge is detected. From the value of inflow/outflow current and the current-voltage characteristic, it is specified that the current-voltage of a display panel is located on the point (b) (V
b , I
b ). The voltage threshold value Vref is inductively determined from the current threshold value Ir at which the flickering of a screen exceeds the limit. When the voltage value V
b is larger than the threshold value Vref, the difference ΔV between both is fed back to a voltage source and the voltage outputting value is lowered in accordance with the difference ΔV. The current-voltage of the panel is returned from the point (b) to the point (a) along the characteristic curve and the current is always suppressed to Ir or less.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：防止显示屏闪烁并减少不必要的辐射噪音。

解决方案：检测持续放电期间的面板流入/流出电流。 根据流入/流出电流值和电流 - 电压特性，指定显示面板的电流 - 电压位于点（b）（V B ，I b'/ SB>）。 根据屏幕闪烁超过限制的当前阈值Ir感应地确定电压阈值Vref。 当电压值V b 大于阈值Vref时，两者之间的差值ΔV被反馈到电压源，并且电压输出值根据差值ΔV而降低。 面板的电流电压从特征曲线返回点（b）到点（a），电流总​​是被抑制在Ir以下。 版权所有（C）2004，JPO

公开(公告)号：JP2004071220A

公开(公告)日：2004-03-04

申请号：JP2002226018

申请日：2002-08-02

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOJIMA SHIGERU

IPC: H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/34 ,  H01J11/36 ,  H01J11/02

Abstract: PROBLEM TO BE SOLVED: To provide a low-cost plasma display hardly producing erroneous discharge and providing a high-grade picture quality.
SOLUTION: This plasma display is provided with a first substrate 11, a second substrate 21 oppositely disposed inside the first substrate 11 and formed with a hermetically closed discharge space 4 therebetween, at least, a pair of discharge retention electrodes 12 formed inside the first substrate 11 and formed with a discharge gap therebetween, a plurality of address electrodes 22 formed inside the second substrate 21 so as to intersect with the discharge retention electrodes 12 via the discharge space 4 in the plan view. The area viewed from the plan side of the discharge space 4 intersecting with one 12a of the paired discharge retention electrodes 12 is larger than the area viewed from the plan side of the discharge space 4 intersecting with the other 12b of the paired discharge retention electrodes 12.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供一种低成本的等离子体显示器，几乎不产生错误放电并提供高品质的图像质量。 解决方案：该等离子体显示器设置有第一基板11，第二基板21，第二基板21相对地设置在第一基板11的内部，并且在其间形成有密封的放电空间4，至少形成有一对形成在其内的放电保持电极12 第一基板11在其之间形成有放电间隙，形成在第二基板21内部以在平面图中经由放电空间4与放电保持电极12相交的多个寻址电极22。 从与一对放电保持电极12的一个12a相交的放电空间4的平面侧观察的区域大于从与放电空间4的一对放电保持电极12的另一个12b相交的放电空间4的平面侧观察的区域 版权所有（C）2004，JPO

公开(公告)号：JP2003243695A

公开(公告)日：2003-08-29

申请号：JP2002044238

申请日：2002-02-21

Applicant: SONY CORP

Inventor： OKUYAMA HIROYUKI ,  KOJIMA SHIGERU

IPC: H01L21/20 ,  H01L21/205 ,  H01L21/365 ,  H01L33/06 ,  H01L33/08 ,  H01L33/16 ,  H01L33/28 ,  H01L33/32 ,  H01L33/34 ,  H01L33/38 ,  H01L33/42 ,  H01L33/00

Abstract: PROBLEM TO BE SOLVED: To provide a light emitting element having a single crystal semiconductor layer of good crystallinity formed on a low crystallinity amorphous substrate, for example, its fabricating method and a display. SOLUTION: A semiconductor layer 20 is formed on one side of a substrate 11 through an intermediate layer 12 of silicon or germanium. The intermediate layer 12 has a crystal surface at least on the side where the semiconductor layer 20 is formed. The single crystal semiconductor layer 20 is grown on the amorphous substrate 11 of quartz glass, or the like, using the semiconductor layer 20 as a base. According to the method, an element array can be formed readily on a large area substrate 11. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2001284660A

公开(公告)日：2001-10-12

申请号：JP2000100040

申请日：2000-03-31

Applicant: SONY CORP

Inventor： NAKAO ISAMU ,  OKUYAMA HIROYUKI ,  SHIRAI KATSUYA ,  TODA ATSUSHI ,  KOJIMA SHIGERU

IPC: G09F9/33 ,  G09F9/00 ,  G09F9/40 ,  H01L33/00 ,  H01L33/08 ,  H01L33/28 ,  H01L33/30 ,  H01L33/42 ,  H01L33/44 ,  H01L33/48 ,  H01L33/58

Abstract: PROBLEM TO BE SOLVED: To provide a display device in which LEDs can be mounted and wired easily, can be manufactured efficiently, and can display high-quality pictures and a method of manufacturing the device. SOLUTION: In this display device, light emitting diode elements are arranged in a matrix by arranging a plurality of bar-like substrates on each of which a plurality of light emitting diode elements are linearly arranged, in the widthwise direction.

公开(公告)号：JPH07286975A

公开(公告)日：1995-10-31

申请号：JP10214694

申请日：1994-04-15

Applicant: SONY CORP

Inventor： KOJIMA SHIGERU ,  RYU KOSUKE ,  KUDO YOSHIHIRO ,  KAWATO SEIJI

IPC: G01N23/223

Abstract: PURPOSE:To enable detection sensitivity (S/N) to be increased with its back ground fully decreased, and also enable sensitivity to be much more increased with radiation electromagnetic waves high in brightness made possible to be used. CONSTITUTION:This invention is concerned with the analysis device by electromagnetic waves (total reflection fluorescence X-ray analysis device in particular), which is provided with an irradiation means irradiating electromagnetic waves such as high brightness X-rays and the like to an object to be analyzed (heat source 51, monochromater 2 and collimater slit 3), a detection means such as a semiconductor detector 8 and the like, which detects electromagnetic waves individual to an object 5, generated out of the object 5 (fluorescence X-rays in particular), and furthermore with a back ground reducing means such as a slit 40 and the like, which is interposed between the object 5 and the irradiating means.

公开(公告)号：JPS6144787A

公开(公告)日：1986-03-04

申请号：JP16692584

申请日：1984-08-09

Applicant: Sony Corp

Inventor： KOJIMA SHIGERU ,  KANO YASUO ,  USUI SETSUO

IPC: C30B13/06 ,  C30B1/08 ,  C30B13/00 ,  H01L21/20 ,  H01L21/208 ,  H01L21/368

Abstract: PURPOSE: To obtain the titled thin film having excellent crystallinity and free from (sub)grain boundary and crack, by scanning a semiconductor layer having a specific shape with a heating means along the direction of the stem and cooling and solidifying the molten semiconductor layer.
CONSTITUTION: An insulation substrate 1 made of e.g. quartz, etc. is coated with a polycrystalline semiconductor layer 3 and then with a cap layer 4 such as SiO
2 layer and/or a cap layer 6 such as Si
3 N
4 layer, etc. by chemical vapor deposition process. The polycrystalline semiconductor layer 3 is composed of the stem 3a having a width (c) of ≥10μm and branches 3b protruded from the stem 3a at an interval of ≥several μm and having a protruded length (a) of 20W80μm and a length (b) along the stem direction of 20W40μm (a≥b). A heating means (e.g. laser source) having the temperature gradient of the figure along the direction O-O' is transferred along the direction of the arrow α to effect the melting of the semiconductor layer 3. Thereafter, the molten semiconductor layer is cooled and solidified to obtain the titled thin film free from cracks, etc., in the region of the branch 3b surrounded by the dotted line D.
COPYRIGHT: (C)1986,JPO&Japio

Abstract translation: 目的：为了获得具有优异结晶性且不含（亚）晶界和裂纹的标题薄膜，通过沿着杆的方向用加热装置扫描具有特定形状的半导体层并冷却和固化熔融半导体层。 构成：由例如制成的绝缘基板1。 石英等涂覆有多晶半导体层3，然后通过化学气相沉积工艺涂覆诸如SiO 2层和/或诸如Si 3 N 4层的覆盖层6等覆盖层4。 多晶半导体层3由具有> =10μm的宽度（c）>>10μm的杆3a和从杆3a突出的间隔> =几个母体并且具有20-80μm的突出长度（a）的分支3b组成， 沿茎方向的长度（b）为20-40mum（a> = b）。 具有沿着方向O0'的图形的温度梯度的加热装置（例如激光源）沿着箭头α的方向转移以实现半导体层3的熔化。此后，将熔融半导体层冷却并固化成 在由虚线D包围的分支3b的区域中获得没有裂纹等的标题薄膜。

公开(公告)号：JP2006190851A

公开(公告)日：2006-07-20

申请号：JP2005002057

申请日：2005-01-07

Applicant: Sony Corp ,  ソニー株式会社

Inventor： OKUYAMA HIROYUKI ,  BIWA TSUYOSHI ,  KOJIMA SHIGERU ,  OHATA TOYOJI

IPC: H01L33/08 ,  H01L33/22 ,  H01L33/30 ,  H01L33/42 ,  H01L33/54 ,  H01L33/56

Abstract: PROBLEM TO BE SOLVED: To provide an integrated light emitting diode which can greatly reduce thermal resistance and of which the light emitting efficiency is high.
SOLUTION: An n-type GaN layer 15, an active layer 16, and a p-type GaN layer 17 are grown on a substrate in order, and after a p-side electrode 18 is formed thereon, these semiconductor layers are etched while the electrode 18 is used as a mask so as to form micro light emitting diodes of 20 μm or less in size. The conductive layer 21 of a semiconductor substrate 20 is stuck to the p-side electrode 18 of the micro light emitting diodes to make a heat sink. The substrate is peeled off by a laser peeling method, and then the semiconductor layer exposed by peeling is etched or polished to be flattened, and the flat surface is made uneven to scatter the light of an emitted wavelength, and then an n-side electrode 22 comprised of a transparent electrode is formed on the n-type GaN layer 15. Then, the semiconductor substrate 20 wherein the micro light emitting diodes are formed is cut into chips to obtain the integrated light emitting diode.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供可以大大降低热阻并且其发光效率高的集成发光二极管。 解决方案：在衬底上依次生长n型GaN层15，有源层16和p型GaN层17，并且在其上形成p侧电极18之后，这些半导体层是 在电极18用作掩模时蚀刻，以形成20μm以下的微小发光二极管。 将半导体衬底20的导电层21粘贴到微型发光二极管的p侧电极18上以形成散热片。 通过激光剥离法将基板剥离，然后通过剥离曝光的半导体层被蚀刻或抛光而变平，并且使平坦表面不均匀以散射发射波长的光，然后是n侧电极 在n型GaN层15上形成由透明电极构成的透明电极22.然后，将其中形成有微型发光二极管的半导体衬底20切成芯片以获得集成发光二极管。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004028906A

公开(公告)日：2004-01-29

申请号：JP2002188575

申请日：2002-06-27

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOJIMA SHIGERU

IPC: G01N23/225 ,  H01J9/02 ,  H01J11/22 ,  H01J11/34 ,  H01J11/40

Abstract: PROBLEM TO BE SOLVED: To provide a secondary electron emission rate measuring device capable of easily measuring the secondary electron emission rate of a film to be measured at a state close to the discharge phenomenon of a plasma display panel. SOLUTION: The direct current discharge of rare gas is generated by applying direct current charged particle generating voltage between a pair of charged particle generating electrodes 11a, 11b. Rare gas particles which are generated by the discharge phenomenon and exist in the charge state, that is, charged particles are accelerated in direct current electric field formed between a pair of charged particle acceleration electrodes 14, 15, and a sample 1 in a sample chamber 20 is irradiated with the rare gas particles. The secondary electron emitted from a protecting layer 5 of the sample 1 is captured by a collecting electrode 22, and the secondary electron emission rate is measured by the current flowing in the collecting electrode 22 and an electrode 3. COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2004022472A

公开(公告)日：2004-01-22

申请号：JP2002179336

申请日：2002-06-20

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KOJIMA SHIGERU

IPC: H01J11/22 ,  H01J11/34 ,  H01J11/36 ,  H01J11/38 ,  H01J11/02

Abstract: PROBLEM TO BE SOLVED: To provide a plasma display contributing to reduction in power consumption by reducing a datagram writing voltage, improving display quality by preventing erroneous discharge during datagram writing, and contributing to an improvement in picture quality by restraining a mutual interference of adjacent address electrodes (interference between picture elements).
SOLUTION: The plasma display comprises a first substrate 11, a second substrate 21 arranged opposedly inside the first substrate 11 forming a tightly sealed discharging space 4 between, at least a pair of discharge maintenance electrodes 12 formed inside the first substrate 11 forming discharging gaps, a plurality of address electrodes 22 formed inside the second substrate so as to cross a discharge maintenance electrode 12 viewed from a surface side via the discharging space 4, a dielectric film 23 for the address electrode covering the surface of the discharging space side of the address electrodes 22, and a barrier rib 24 formed inside the second substrate 21 positioned between the address electrodes 22 so as to partition the discharging space 4. The barrier rib 24 is formed inside the second substrate 21 so that the dielectric film 23 for the address electrode is separately contacted at each address electrode 22 at the bottom of the barrier rib 24. The dielectric constant of the address electrode dielectric film 23 is higher than that of the barrier rib 24.
COPYRIGHT: (C)2004,JPO