公开(公告)号：US11536872B2

公开(公告)日：2022-12-27

申请号：US16450365

申请日：2019-06-24

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Abderrezak Marzaki ,  Yoann Goasduff ,  Virginie Bidal ,  Pascal Fornara

IPC: H01H37/04 ,  H01H37/32 ,  H01H37/42 ,  H01H9/02 ,  H01L29/423 ,  H01L49/02 ,  G01V7/04 ,  B81B3/00 ,  B81C1/00 ,  H01L21/3213 ,  H01H61/013

Abstract: A method of operating a mechanical switching device is disclosed. The switching device includes a housing, an assembly disposed in the housing, and a body. The assembly is thermally deformable and comprises a beam held in two different places by two arms secured to edges of the housing. The beam is remote from the body in a first configuration and in contact with and immobilized by the body in a second configuration. The assembly has the first configuration at a first temperature and the second configuration when one of the arms has a second temperature different from the first temperature. The method includes exposing an arm of the assembly to the second temperature, and releasing the beam using a release mechanism. The release mechanism includes a pointed element comprising a pointed region directed towards the body. The pointed element limits an open crater in a concave part of a projection.

公开(公告)号：US11493470B2

公开(公告)日：2022-11-08

申请号：US16928551

申请日：2020-07-14

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Matthias Vidal-Dho ,  Quentin Hubert ,  Pascal Fornara

IPC: G01N27/22 ,  G01N27/12 ,  H01L23/00

Abstract: Moisture that is possibly present in an integrated circuit is detected autonomously by the integrated circuit itself. An interconnect region of the integrated circuit includes a metal level with a first track and a second track which are separated by a dielectric material. A detection circuit applies a potential difference between the first and second tracks. A current circulating in one of the first and second tracks in response to the potential difference is measured and compared to a threshold. If the current exceeds the threshold, this is indicative of the presence of moisture which renders said dielectric material less insulating.

公开(公告)号：US11367720B2

公开(公告)日：2022-06-21

申请号：US16518436

申请日：2019-07-22

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: H01L27/02 ,  H01L23/525

Abstract: An integrated circuit includes a circuit module storing sensitive data. An electrically conductive body at a floating potential is located in the integrated circuit and holds an initial amount of electric charge. In response to an attack attempting to access the sensitive data, electric charge is collected on the electrically conductive body. A protection circuit is configured to ground an output of the circuit module, and thus preclude access to the sensitive data, in response to collected amount of electric charge on the electrically conductive body differing from the initial amount and exceeding a threshold.

公开(公告)号：US11322503B2

公开(公告)日：2022-05-03

申请号：US17141498

申请日：2021-01-05

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: G11C17/16 ,  H01L27/112 ,  H01L23/58 ,  H01L23/528 ,  G11C17/18 ,  H01L23/525 ,  H01L23/522

Abstract: An integrated circuit includes a memory cell incorporating an antifuse device. The antifuse device includes a state transistor having a control gate and a second gate that is configured to be floating. A dielectric layer between the control gate and the second gate is selectively blown in order to confer a broken-down state on the antifuse device where the second gate is electrically coupled to the control gate for storing a first logic state. Otherwise, the antifuse device is in a non-broken-down state for storing a second logic state.

公开(公告)号：US11075246B2

公开(公告)日：2021-07-27

申请号：US15818496

申请日：2017-11-20

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Christian Rivero ,  Pascal Fornara

IPC: H01L27/16 ,  H01L35/32

Abstract: Method for generation of electrical power within a three-dimensional integrated structure comprising several elements electrically intercoupled by a link device, the method comprising the production of a temperature gradient in at least one region of the link device resulting from the operation of at least one of the said elements and the production of electrical power using at least one thermo-electric generator comprising at least one assembly of thermocouples electrically coupled in series and thermally coupled in parallel and contained within the said region subjected to the said temperature gradient.

公开(公告)号：US10937746B2

公开(公告)日：2021-03-02

申请号：US16549000

申请日：2019-08-23

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Abderrezak Marzaki ,  Pascal Fornara

IPC: H01L27/08 ,  H01L23/00 ,  G04F1/00 ,  H01L21/70 ,  H01L27/01 ,  H01L27/10

Abstract: An ultralong time constant time measurement device includes elementary capacitive elements that are connected in series. Each elementary capacitive element is formed by a stack of a first conductive region, a dielectric layer having a thickness suited for allowing charge to flow by direct tunneling effect, and a second conductive region. The first conductive region is housed in a trench extending from a front face of a semiconductor substrate down into the semiconductor substrate. The dielectric layer rests on the first face of the semiconductor substrate and in particular on a portion of the first conductive region in the trench. The second conductive region rests on the dielectric layer.

公开(公告)号：US10923484B2

公开(公告)日：2021-02-16

申请号：US16546002

申请日：2019-08-20

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara ,  Fabrice Marinet

IPC: G11C17/16 ,  H01L27/112 ,  H01L23/58 ,  H01L23/528 ,  G11C17/18 ,  H01L23/525 ,  H01L23/522

Abstract: An integrated circuit includes a memory cell incorporating an antifuse device. The antifuse device includes a state transistor having a control gate and a second gate that is configured to be floating. A dielectric layer between the control gate and the second gate is selectively blown in order to confer a broken-down state on the antifuse device where the second gate is electrically coupled to the control gate for storing a first logic state. Otherwise, the antifuse device is in a non-broken-down state for storing a second logic state.

公开(公告)号：US10895856B2

公开(公告)日：2021-01-19

申请号：US16155355

申请日：2018-10-09

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Pascal Fornara

IPC: G05B19/042 ,  G04G19/12 ,  G04G19/10 ,  H02J7/00 ,  H04L29/08 ,  H04W52/02 ,  H02J9/00 ,  H02J7/34

Abstract: A system, supplied by a power supply, is switched into standby mode by an electronic device that includes a charging input coupled to a charge voltage obtained from the voltage delivered by the power supply. A first input is coupled to the power supply and a power supply output is coupled to the system. A storage capacitive element is coupled to the charging input and configured to be charged by the charge voltage. A switching circuit, coupled between the first input and the power supply output, disconnects the power supply output from the first input when the voltage across the terminals of the storage capacitive element is higher than a threshold. A discharge circuit discharges the storage capacitive element so that the capacitor voltage becomes lower than the threshold. The switching circuit further re-connects the first input to the power supply output at the end of the discharge period.

公开(公告)号：US10886283B2

公开(公告)日：2021-01-05

申请号：US16525780

申请日：2019-07-30

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Abderrezak Marzaki ,  Pascal Fornara

IPC: H01L27/11 ,  H01L27/112 ,  H01L23/00 ,  G11C17/18 ,  G11C17/16 ,  H01L23/525

Abstract: An integrated circuit includes at least one antifuse element. The antifuse element is formed from a semiconductor substrate, a trench extending down from a first face of the semiconductor substrate into the semiconductor substrate, a first conductive layer housed in the trench and extending down from the first face of the semiconductor substrate into the semiconductor substrate, a dielectric layer on the first face of the semiconductor substrate, and a second conductive layer on the dielectric layer. A program transistor selectively electrically couples the second conductive layer to a program voltage in response to a program signal. A program/read transistor selectively electrically couples the first conductive layer to a ground voltage in response to the program signal and in response to a read signal. A read transistor selectively electrically couples the second conductive layer to a read amplifier in response to the read signal.

公开(公告)号：US10861802B2

公开(公告)日：2020-12-08

申请号：US16208253

申请日：2018-12-03

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Christian Rivero ,  Pascal Fornara ,  Guilhem Bouton ,  Mathieu Lisart

IPC: H01L21/311 ,  H01L23/00 ,  H01L23/58 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088 ,  H01L23/522 ,  H01L21/768

Abstract: An integrated circuit includes a semiconductor substrate and a multitude of electrically conductive pads situated between component zones of the semiconductor substrate and a first metallization level of the integrated circuit, respectively. The multitude of electrically conductive pads are encapsulated in an insulating region and include: first pads, in electrical contact with corresponding first component zones, and at least one second pad, not in electrical contact with a corresponding second component zone.