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公开(公告)号：US11035928B2
公开(公告)日：2021-06-15
申请号：US15642880
申请日：2017-07-06
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karthik Subburaj , Brian Ginsburg , Karthik Ramasubramanian
IPC: G01S7/03 , G01S7/40 , G01S13/87 , H04L7/04 , G01S13/931
Abstract: The disclosure provides a radar apparatus for estimating a position and a velocity of a plurality of obstacles. The radar apparatus includes a slave radar chip. A master radar chip is coupled to the slave radar chip. The master radar chip includes a local oscillator that generates a transmit signal. The slave radar chip receives the transmit signal on a first path and sends the transmit signal back to the master radar chip on a second path. A delay detect circuit is coupled to the local oscillator and receives the transmit signal from the slave radar chip on the second path and the transmit signal from the local oscillator. The delay detect circuit estimates a routing delay from the transmit signal received from the slave radar chip on the second path and from the transmit signal received from the local oscillator.
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公开(公告)号：US20210011118A1
公开(公告)日：2021-01-14
申请号：US17020931
申请日：2020-09-15
Applicant: Texas Instruments Incorporated
Inventor： Karthik Subburaj , Karthik Ramasubramanian , Sriram Murali , Sreekiran Samala , Krishnanshu Dandu
Abstract: A noise-mitigated continuous-wave frequency-modulated radar includes, for example, a transmitter for generating a radar signal, a receiver for receiving a reflected radar signal and comprising a mixer for generating a baseband signal in response to the received radar signal and in response to a local oscillator (LO) signal, and a signal shifter coupled to at least one of the transmitter, LO input of the mixer in the receiver and the baseband signal generated by the mixer. The impact of amplitude noise or phase noise associated with interferers, namely, for example, strong reflections from nearby objects, and electromagnetic coupling from transmit antenna to receive antenna, on the detection of other surrounding objects is reduced by configuring the signal shifter in response to an interferer frequency and phase offset.
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公开(公告)号：US20200209353A1
公开(公告)日：2020-07-02
申请号：US16816588
申请日：2020-03-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karthik Subburaj , Brian Paul Ginsburg , Daniel Colum Breen , Sandeep Rao , Karthik Ramasubramanian
IPC: G01S7/40 , G01S13/931 , G01S7/35 , G01S7/03
Abstract: Methods for monitoring of performance parameters of one or more receive channels and/or one or more transmit channels of a radar system-on-a-chip (SOC) are provided. The radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner coupled to each of one or more transmit channels, a splitter coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.
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公开(公告)号：US10330773B2
公开(公告)日：2019-06-25
申请号：US15184715
申请日：2016-06-16
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Rao , Karthik Ramasubramanian , Indu Prathapan , Raghu Ganesan , Pankaj Gupta
Abstract: A radar hardware accelerator (HWA) includes a fast Fourier transform (FFT) engine including a pre-processing block for providing interference mitigation and/or multiplying a radar data sample stream received from ADC buffers within a split accelerator local memory that also includes output buffers by a pre-programmed complex scalar or a specified sample from an internal look-up table (LUT) to generate pre-processed samples. A windowing plus FFT block (windowed FFT block) is for multiply the pre-processed samples by a window vector and then processing by an FFT block for performing a FFT to generate Fourier transformed samples. A post-processing block is for computing a magnitude of the Fourier transformed samples and performing a data compression operation for generating post-processed radar data. The pre-processing block, windowed FFT block and post-processing block are connected in one streaming series data path.
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公开(公告)号：US20190154797A1
公开(公告)日：2019-05-23
申请号：US16253790
申请日：2019-01-22
Applicant: Texas Instruments Incorporated
Inventor： Karthik Subburaj , Brian Paul Ginsburg , Daniel Colum Breen , Sandeep Rao , Karthik Ramasubramanian
Abstract: Methods for monitoring of performance parameters of one or more receive channels and/or one or more transmit channels of a radar system-on-a-chip (SOC) are provided. The radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner coupled to each of one or more transmit channels, a splitter coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.
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Patent Agency Ranking
公开(公告)号：US20170299693A1
公开(公告)日：2017-10-19
申请号：US15635659
申请日：2017-06-28
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Karthik Ramasubramanian , Karthik Subburaj , Sachin Bhardwaj
CPC classification number: G01S7/35 , G01S13/343 , G01S13/584 , G01S13/726 , G01S13/931 , G01S2013/0245
Abstract: The disclosure provides a radar apparatus for estimating a position and a velocity of the plurality of obstacles. The radar apparatus includes a local oscillator that generates a first signal. A first transmit unit receives the first signal from the local oscillator and generates a first transmit signal. A frequency shifter receives the first signal from the local oscillator and generates a second signal. A second transmit unit receives the second signal and generates a second transmit signal. The frequency shifter provides a frequency offset to the first signal based on a routing delay mismatch to generate the second signal such that the first transmit signal is phase coherent with the second transmit signal.
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公开(公告)号：US20170090014A1
公开(公告)日：2017-03-30
申请号：US14870129
申请日：2015-09-30
Applicant: Texas Instruments Incorporated
Inventor： Karthik Subburaj , Brian Paul Ginsburg , Daniel Colum Breen , Sandeep Rao , Karthik Ramasubramanian
IPC: G01S7/40
CPC classification number: G01S7/4004 , G01S7/032 , G01S7/35 , G01S7/4052 , G01S7/4056 , G01S13/0209 , G01S13/931 , G01S2007/4065 , G01S2007/4069
Abstract: Methods for monitoring of performance parameters of one or more receive channels and/or one or more transmit channels of a radar system-on-a-chip (SOC) are provided. The radar SOC may include a loopback path coupling at least one transmit channel to at least one receive channel to provide a test signal from the at least one transmit channel to the at least one receive channel when the radar SOC is operated in test mode. In some embodiments, the loopback path includes a combiner coupled to each of one or more transmit channels, a splitter coupled to each of one or more receive channels, and a single wire coupling an output of the combiner to an input of the splitter.
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28.发明申请Interference Detection in a Frequency Modulated Continuous Wave (FMCW) Radar System 审中-公开频率调制连续波（FMCW）雷达系统中的干扰检测公开(公告)号：US20160291130A1
公开(公告)日：2016-10-06
申请号：US14679461
申请日：2015-04-06
Applicant: Texas Instruments Incorporated
Inventor： Brian Paul Ginsburg , Karthik Subburaj , Karthik Ramasubramanian , Sachin Bhardwaj , Sriram Murali , Sandeep Rao
CPC classification number: G01S7/352 , G01S7/023 , G01S7/40 , G01S13/32 , G01S13/931
Abstract: A frequency modulated continuous wave (FMCW) radar system is provided that includes a receiver configured to generate a digital intermediate frequency (IF) signal, and an interference monitoring component coupled to the receiver to receive the digital IF signal, in which the interference monitoring component is configured to monitor at least one sub-band in the digital IF signal for interference, in which the at least one sub-band does not include a radar signal.
Abstract translation: 提供了一种频率调制连续波（FMCW）雷达系统，其包括被配置为产生数字中频（IF）信号的接收机和耦合到接收机以接收数字IF信号的干扰监测部件，其中干扰监测部件 被配置为监视用于干扰的数字IF信号中的至少一个子带，其中至少一个子带不包括雷达信号。
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29.发明申请公开(公告)号：US20160146931A1
公开(公告)日：2016-05-26
申请号：US14550774
申请日：2014-11-21
Applicant: Texas Instruments Incorporated
Inventor： Sandeep Rao , Karthik Ramasubramanian , Brian Ginsburg , Jawaharlal Tangudu , Karthik Subbaraj
CPC classification number: G01S7/032 , G01S13/343 , G01S13/931 , H01Q1/3233
Abstract: A device includes a circuit board having thereon, a controlling component, a first radar chip and a second radar chip. The first radar chip includes a first radar transmission antenna, a second radar transmission antenna and a first radar receiver antenna array. The second radar chip includes a second radar receiver antenna array. The controlling component can control the first radar chip and the second radar chip. The first radar transmission antenna can transmit a first radar transmission signal. The second radar transmission antenna can transmit a second radar transmission signal. The second radar chip is spaced from the first radar chip so as to create a virtual receiver antenna array between the first radar receiver antenna array and the second radar receiver antenna array.
Abstract translation: 一种装置包括其上具有控制部件，第一雷达芯片和第二雷达芯片的电路板。 第一雷达芯片包括第一雷达发射天线，第二雷达发射天线和第一雷达接收机天线阵列。 第二雷达芯片包括第二雷达接收机天线阵列。 控制部件可以控制第一雷达芯片和第二雷达芯片。 第一雷达发射天线可以传输第一雷达传输信号。 第二雷达发射天线可以发射第二雷达传输信号。 第二雷达芯片与第一雷达芯片间隔开，以在第一雷达接收机天线阵列和第二雷达接收机天线阵列之间创建虚拟接收机天线阵列。
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公开(公告)号：US09020459B2
公开(公告)日：2015-04-28
申请号：US13680549
申请日：2012-11-19
Applicant: Texas Instruments Incorporated
Inventor： Deric Wayne Waters , Karthik Ramasubramanian , Arun Raghupathy
CPC classification number: H04B1/1615 , G01S19/34
Abstract: An electronic circuit includes a receiver circuit (BSP) operable to perform coherent summations having a coherent summations time interval, and a power control circuit (2130) coupled to said receiver circuit (BSP) and operable to impress a power controlling duty cycle (TON, TOFF) on the receiver circuit (BSP) inside the coherent summations time interval. Other circuits, devices, systems, methods of operation and processes of manufacture are also disclosed.
Abstract translation: 电子电路包括可操作以执行具有相干求和时间间隔的相干相加的接收器电路（BSP）和耦合到所述接收器电路（BSP）的功率控制电路（2130），并且可操作以将功率控制占空比（TON， TOFF）在相干求和时间间隔内的接收机电路（BSP）上。 还公开了其它电路，装置，系统，操作方法和制造方法。
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