公开(公告)号：FR3051570A1

公开(公告)日：2017-11-24

申请号：FR1654576

申请日：2016-05-23

Applicant: STMICROELECTRONICS (ALPS) SAS

Inventor： PONS ALEXANDRE

IPC: G05F1/10 ,  G06F13/38

Abstract: Dispositif de régulation à faible chute de tension, comprenant un amplificateur d'erreur (AE) et un étage de puissance (ETP) ayant une borne de sortie (BS) rebouclée sur l'amplificateur d'erreur (AE) et apte à délivrer un courant de sortie dans une charge (RL, CL). Le dispositif comprend plusieurs entrées principales d'alimentation (EALPi) destinées à potentiellement recevoir respectivement plusieurs tensions d'alimentation différentes, en ce que l'étage de puissance (ETP) comprend plusieurs chemins de conduction (PTHi) respectivement connectés entre lesdites entrées principales d'alimentation et ladite borne de sortie, individuellement sélectionnables et comportant chacun un transistor de sortie (MPgi), en ce qu'il comprend en outre un circuit de sélection (CSL) connecté auxdites entrées principales d'alimentation et configuré pour sélectionner l'un des chemins de conduction (PTHi) en fonction d'un critère de sélection, et en ce que l'amplificateur d'erreur (AE) comporte un étage de sortie (ETS) configuré pour piloter sélectivement le transistor de sortie (MPgi) du chemin de conduction sélectionné.

公开(公告)号：DE102016102976A1

公开(公告)日：2017-02-09

申请号：DE102016102976

申请日：2016-02-19

Applicant: STMICROELECTRONICS (ALPS) SAS

Inventor： LENZ KUNO

IPC: H02M1/08 ,  H02P7/285

Abstract: Die Erfindung betrifft eine Spannungsquelle, wobei mindestens ein erster Schalter (NM1) einen ersten Knoten (9) der Spannungsquelle mit einem Knoten (15) zum Anlegen mindestens eines Potenzials einer Versorgungsspannung koppelt, und mindestens ein erstes kapazitives Element (C1) den ersten Knoten oder einen zweiten Knoten (11) der Spannungsquelle mit einem Steuerknoten (G1) des ersten Schalters koppelt.

公开(公告)号：FR3032573A1

公开(公告)日：2016-08-12

申请号：FR1550952

申请日：2015-02-06

Applicant: STMICROELECTRONICS (ALPS) SAS ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： COTTINET JONATHAN ,  BINI JEAN-CLAUDE

IPC: H04B15/00 ,  H04B1/10 ,  H04B15/02

Abstract: Procédé d'émission et/ou de réception d'un signal audio potentiellement agresseur comportant une émission et/ou une réception de groupes successifs de données cadencées par un premier signal d'horloge au sein de trames respectives successives synchronisées par un second signal d'horloge. En présence d'un risque d'interférence du signal audio potentiellement agresseur avec un autre signal potentiellement victime lors de l'émission ou de la réception du signal potentiellement agresseur, on modifie la fréquence (SCK) du premier signal d'horloge en maintenant inchangée la fréquence (SYNC) du second signal d'horloge.

公开(公告)号：US12271607B2

公开(公告)日：2025-04-08

申请号：US18318416

申请日：2023-05-16

Applicant: STMicroelectronics (Alps) SAS

Inventor： Jawad Benhammadi

IPC: G06F3/06

Abstract: In an embodiment a method includes modifying or suppressing one or more data values of a non-volatile memory, wherein the one or more data values are stored in a first sector of the non-volatile memory, wherein the first sector is designated as a current sector by one or more selection values stored in the non-volatile memory, wherein modifying or suppressing comprises writing the one or more data values into a second sector of the non-volatile memory, and wherein the second sector is designated as an alternate sector by the one or more selection values.

公开(公告)号：US12266613B2

公开(公告)日：2025-04-01

申请号：US17847330

申请日：2022-06-23

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Claire Laporte ,  Laurent Schwartz ,  Godfrey Dimayuga

IPC: H01L23/49 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552

Abstract: A support substrate has a mounting face and a connection face opposite to the mounting face. An electronic chip is mounted to the mounting face and a matrix of connectors is mounted to the connection face. The support substrate includes an interconnection structure formed by a pair of conductive interconnection tracks that electrically connect the electronic chip to the matrix of connectors and circulate differential signals. The two interconnection tracks of the pair of conductive interconnection tracks extend facing each other at different depths of the support substrate. An isolation structure in the support substrate laterally isolates the pair of conductive interconnection tracks. Isolation plates above and below the pair of conductive interconnection tracks provide further isolation.

公开(公告)号：US12253894B2

公开(公告)日：2025-03-18

申请号：US17884245

申请日：2022-08-09

Applicant: STMICROELECTRONICS (ROUSSET) SAS ,  STMICROELECTRONICS (ALPS) SAS

Inventor： Alexandre Tramoni ,  Patrick Arnould

IPC: G06F1/00 ,  G06F1/26 ,  G06F11/30

Abstract: The present disclosure relates to a method for powering an electronic device. The electronic device includes at least one universal integrated circuit card or at least one secure element; at least one power supply circuit for said card or secure element; and at least one near field communication module. When the near field communication module changes from a standby or inactive state to an active state, the following successive operations are performed: —the components and circuits of said electronic device are started; —programs of the electronic device and said secure card or element are started at the same time.

公开(公告)号：US20240176863A1

公开(公告)日：2024-05-30

申请号：US18514795

申请日：2023-11-20

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Grand Quest) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Fabrice Cheruel ,  Dragos Davidescu ,  Nicolas Anquet

IPC: G06F21/44 ,  G06F21/71

CPC classification number: G06F21/44 ,  G06F21/71

Abstract: The system-on-chip includes at least one microprocessor domain including a microprocessor and at least one resource; and a resource isolation system including a filtering circuit for each resource and configured to detect a security, privilege and compartmentalization access rights violation for the resource, by transactions arriving at the resource. The filtering circuit is configured, in the event of a violation of at least one access right to the resource by a transaction, to generate a first error signal representative of the violated access right to the resource, and a second error signal representative of at least one access right of this transaction.

公开(公告)号：US20240125930A1

公开(公告)日：2024-04-18

申请号：US18377893

申请日：2023-10-09

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics Design and Application S.R.O. ,  STMicroelectronics (Alps) SAS

Inventor： Robin VASSAL ,  Jiri ANDRLE ,  Peter CABAJ ,  Cyrille TROUILLEAU

IPC: G01S17/08 ,  G01S7/497

CPC classification number: G01S17/08 ,  G01S7/497

Abstract: A method is for detecting one or more objects in a detection zone using a time-of-flight sensor. The method includes emitting optical radiation via the emission circuitry of the sensor and subsequently capturing the reflected optical radiation using the reception circuitry. This captured radiation is quantified in terms of photons, and measurement circuitry determines both the amount of these photons and the distance from the sensor to the object(s). An analysis of the photon count, combined with the calculated distance, is used to determine the presence or absence of objects within the detection zone.

公开(公告)号：US20240110826A1

公开(公告)日：2024-04-04

申请号：US17955056

申请日：2022-09-28

Applicant: STMicroelectronics (Alps) SAS

Inventor： Vratislav Michal

IPC: G01J1/42 ,  G01J1/44

CPC classification number: G01J1/4204 ,  G01J1/44 ,  G01J2001/446 ,  H03F3/45071

Abstract: A circuit can be used for reading out a light sensor. The circuit includes an operational amplifier. A first capacitor has a first electrode coupled to an inverting input of the operational amplifier and a second electrode coupled to a non-inverting output of the operational amplifier. A compensation circuit is coupled between the operational amplifier and the first capacitor. A preset circuit has an input coupled to a first voltage node and an output coupled to the first capacitor. The first voltage node configured to carry a first voltage equal to a preset voltage multiplied by a coefficient.

公开(公告)号：US20230384429A1

公开(公告)日：2023-11-30

申请号：US18359477

申请日：2023-07-26

Applicant: STMicroelectronics (Alps) SAS

Inventor： Romain David ,  Xavier Branca

IPC: G01S7/484 ,  G01S17/10 ,  H01S5/042 ,  H01S5/062

CPC classification number: G01S7/484 ,  G01S17/10 ,  H01S5/0428 ,  H01S5/062

Abstract: The present disclosure relates to a driver circuit for an optical light emitter of a ranging device, the driver circuit comprising: an inductor having a first of its nodes coupled to a current driver; a first branch comprising a first switch coupled between the second node of the inductor and a first supply voltage rail; a second branch for conducting a current through the optical light emitter, the second branch being coupled between the second node of the inductor and the first supply voltage rail; and a current sensor configured to detect the current passing through the inductor and to provide a feedback signal to the current driver.