公开(公告)号：JP4083167B2

公开(公告)日：2008-04-30

申请号：JP2004510108

申请日：2002-05-31

Applicant: 富士通株式会社

Inventor： 聡 丸山

IPC: H03F1/32 ,  H03F1/52 ,  H03F3/21 ,  H03F3/68 ,  H03G1/00 ,  H03G3/20 ,  H03G3/30 ,  H04K1/02

CPC classification number: H03F1/3241 ,  H03F1/3247 ,  H03F1/52 ,  H03F3/211 ,  H03G1/0088 ,  H03G3/3042 ,  H03G2201/103 ,  H03G2201/206 ,  H03G2201/307 ,  H03G2201/504

公开(公告)号：WO2018044472A1

公开(公告)日：2018-03-08

申请号：PCT/US2017/044939

申请日：2017-08-01

Applicant: QUALCOMM INCORPORATED

Inventor： CASSIA, Marco ,  CABANILLAS, Jose

IPC: H03F1/02 ,  H03F1/56 ,  H03F3/21 ,  H03F3/72 ,  H03G1/00

CPC classification number: H03F3/217 ,  H03F1/0277 ,  H03F1/0288 ,  H03F1/56 ,  H03F1/565 ,  H03F3/19 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/72 ,  H03F2200/222 ,  H03F2200/318 ,  H03F2200/387 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2203/21103 ,  H03F2203/21136 ,  H03F2203/21139 ,  H03F2203/21175 ,  H03F2203/7215 ,  H03F2203/7221 ,  H03F2203/7236 ,  H03G1/00 ,  H03G1/0088 ,  H03G3/3042 ,  H03G2201/504 ,  H03G2201/506 ,  H04B1/40 ,  H04B1/401

Abstract: A power amplifier circuit, including: an input node configured to receive a radio frequency (RF) signal; an output node configured to output an amplified RF signal; a main path switchably coupled between the input node and the output node, and including a first plurality of amplification stages to generate a first amplified RF signal; a bypass path switchably coupled between the input node and the output node, and including at least one second amplification stage to generate a second amplified RF signal; and a coupling switch configured to reuse at least a portion of the bypass path to drive the main path to generate a third amplified RF signal.

Abstract translation: 一种功率放大器电路，包括：输入节点，被配置为接收射频（RF）信号; 输出节点，被配置为输出放大的RF信号; 主路径，可切换地耦合在所述输入节点和所述输出节点之间，并且包括第一多个放大级以生成第一放大RF信号; 旁路路径，可切换地耦合在所述输入节点和所述输出节点之间，并且包括至少一个第二放大级以生成第二放大RF信号; 以及耦合开关，其被配置为重新使用旁路路径的至少一部分来驱动主路径以生成第三放大RF信号。

公开(公告)号：WO2003103137A1

公开(公告)日：2003-12-11

申请号：PCT/JP2002/005341

申请日：2002-05-31

Applicant: 富士通株式会社 ,  丸山 聡

Inventor： 丸山 聡

IPC: H03F1/32

CPC classification number: H03F1/3241 ,  H03F1/3247 ,  H03F1/52 ,  H03F3/211 ,  H03G1/0088 ,  H03G3/3042 ,  H03G2201/103 ,  H03G2201/206 ,  H03G2201/307 ,  H03G2201/504

Abstract: An amplification device comprising two amplifiers for receiving common input signals and outputting amplified signals respectively therefrom, and a synthesizer for synthesizing output signals of the two amplifiers and outputting them. The amplification device suppresses distortion components of the output signals of the amplifiers in a transition state. This amplification device comprises a pre-distortion compensation unit which calculates the distortion compensation component based on the output signal of the synthesizer and compensates the distortion of the input signal of the amplifiers based on the obtained distortion compensation component, and a gain control unit which reduces the gain below a normal value and attenuates the input signal below the normal level when transferring from both-operating state of the two amplifiers to either-operating state, when transferring from either-operating state to both-operating state, when either amplifier is removed, or when the removed amplifier is fitted.

Abstract translation: 一种放大装置，包括两个用于接收公共输入信号并分别从其输出放大信号的放大器，以及合成器，用于合成两个放大器的输出信号并输出​​它们。 放大装置抑制处于过渡状态的放大器的输出信号的失真分量。 该放大装置包括预失真补偿单元，其基于合成器的输出信号来计算失真补偿分量，并且基于获得的失真补偿分量来补偿放大器的输入信号的失真;以及增益控制单元，其减少 当两个放大器从两个放大器的两个工作状态转移到两个工作状态时，当从任一工作状态转换到两个工作状态时，当任一个放大器被去除时，增益低于正常值，并将输入信号衰减到低于正常电平 ，或者当拆下的放大器安装时。

公开(公告)号：US11881828B2

公开(公告)日：2024-01-23

申请号：US17671374

申请日：2022-02-14

Applicant: pSemi Corporation

Inventor： Jing Li ,  Emre Ayranci ,  Miles Sanner

IPC: H03F1/32 ,  H03F1/22 ,  H03F3/193 ,  H03F3/21 ,  H03G3/30 ,  H03F3/72 ,  H03G1/00 ,  H03G3/00

CPC classification number: H03G3/3036 ,  H03F1/223 ,  H03F1/3205 ,  H03F3/193 ,  H03F3/211 ,  H03F3/72 ,  H03G1/0023 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03F2200/156 ,  H03F2200/159 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/61 ,  H03F2203/7239 ,  H03G3/3052 ,  H03G2201/504

Abstract: A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.

公开(公告)号：US20180175807A1

公开(公告)日：2018-06-21

申请号：US15895863

申请日：2018-02-13

Applicant: pSemi Corporation

Inventor： Hossein Noori ,  Chih-Chieh Cheng

IPC: H03F1/32 ,  H03G3/10 ,  H03G3/00 ,  H03F3/195 ,  H03F1/56

CPC classification number: H03F1/3205 ,  H03F1/56 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/18 ,  H03F2200/21 ,  H03F2200/211 ,  H03F2200/213 ,  H03F2200/222 ,  H03F2200/225 ,  H03F2200/24 ,  H03F2200/243 ,  H03F2200/249 ,  H03F2200/27 ,  H03F2200/294 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/306 ,  H03F2200/312 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/417 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/495 ,  H03F2200/546 ,  H03F2200/72 ,  H03F2200/75 ,  H03G1/0029 ,  H03G1/0088 ,  H03G1/0094 ,  H03G3/001 ,  H03G3/008 ,  H03G3/10 ,  H03G2201/106 ,  H03G2201/307 ,  H03G2201/504

Abstract: A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

公开(公告)号：US09929701B1

公开(公告)日：2018-03-27

申请号：US15272103

申请日：2016-09-21

Applicant: Peregrine Semiconductor Corporation

Inventor： Hossein Noori ,  Chih-Chieh Cheng

IPC: H03F1/22 ,  H03F1/32 ,  H03F1/56 ,  H03F3/195 ,  H03G3/00 ,  H03G3/10

CPC classification number: H03F1/3205 ,  H03F1/56 ,  H03F3/195 ,  H03F3/72 ,  H03F2200/18 ,  H03F2200/21 ,  H03F2200/211 ,  H03F2200/213 ,  H03F2200/222 ,  H03F2200/225 ,  H03F2200/24 ,  H03F2200/243 ,  H03F2200/249 ,  H03F2200/27 ,  H03F2200/294 ,  H03F2200/297 ,  H03F2200/301 ,  H03F2200/306 ,  H03F2200/312 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/417 ,  H03F2200/451 ,  H03F2200/48 ,  H03F2200/489 ,  H03F2200/492 ,  H03F2200/495 ,  H03F2200/546 ,  H03F2200/72 ,  H03F2200/75 ,  H03G1/0029 ,  H03G1/0088 ,  H03G1/0094 ,  H03G3/001 ,  H03G3/008 ,  H03G3/10 ,  H03G2201/106 ,  H03G2201/307 ,  H03G2201/504

Abstract: A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

公开(公告)号：US20080284517A1

公开(公告)日：2008-11-20

申请号：US12130453

申请日：2008-05-30

Applicant: Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

Inventor： Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

IPC: H03G3/10

CPC classification number: H03F3/45475 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03G2201/103 ,  H03G2201/504

Abstract: A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

Abstract translation: 提供了改变放大器和放大器阵列的增益的方法。 放大器阵列包括与具有增益控制装置的每个放大器级并联连接的两个或更多个放大器级（201,202）。 为每个放大器级提供输入信号装置（203,204），放大器级的输入信号具有不同的幅度。 提供了用于启用和禁用放大器级（216）的装置，用于对使能的放大器级的输出进行求和以获得输出信号（212）的装置。 放大器阵列的增益具有从具有第一放大级（202）使能的低增益设置的范围，通过当第一放大器级的增益从最小增益增加到最大增益时增加增益设置，第二放大器级 （201）除了第一放大器级以及第二放大器级的增益从最小增益增加到最大增益之外，还可以使能另外的放大器级，直至达到放大器阵列的最大增益设置。 启用的每个放大器级具有递减衰减的输入信号，并且待使能的最终放大器级具有完整输入信号（203）。

公开(公告)号：US07397302B2

公开(公告)日：2008-07-08

申请号：US11734864

申请日：2007-04-13

Applicant: Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

Inventor： Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

IPC: H03F1/14

CPC classification number: H03F3/45475 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03G2201/103 ,  H03G2201/504

Abstract: A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

Abstract translation: 提供了改变放大器和放大器阵列的增益的方法。 放大器阵列包括与具有增益控制装置的每个放大器级并联连接的两个或更多个放大器级（201,202）。 为每个放大器级提供输入信号装置（203,204），放大器级的输入信号具有不同的幅度。 提供了用于启用和禁用放大器级（216）的装置，用于对使能的放大器级的输出进行求和以获得输出信号（212）的装置。 放大器阵列的增益具有从具有第一放大级（202）使能的低增益设置的范围，通过当第一放大器级的增益从最小增益增加到最大增益时增加增益设置，第二放大器级 （201）除了第一放大器级以及第二放大器级的增益从最小增益增加到最大增益之外，还可以使能另外的放大器级，直至达到放大器阵列的最大增益设置。 启用的每个放大器级具有递减衰减的输入信号，并且待使能的最终放大器级具有完整输入信号（203）。

公开(公告)号：US20070194848A1

公开(公告)日：2007-08-23

申请号：US11734864

申请日：2007-04-13

Applicant: Thomas Bardsley ,  Matthew Cordrey-Gale ,  James Mason ,  Philip Murfet ,  Gareth Nicholls

Inventor： Thomas Bardsley ,  Matthew Cordrey-Gale ,  James Mason ,  Philip Murfet ,  Gareth Nicholls

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03G2201/103 ,  H03G2201/504

Abstract: A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

Abstract translation: 提供了改变放大器和放大器阵列的增益的方法。 放大器阵列包括与具有增益控制装置的每个放大器级并联连接的两个或更多个放大器级（201,202）。 为每个放大器级提供输入信号装置（203,204），放大器级的输入信号具有不同的幅度。 提供了用于启用和禁用放大器级（216）的装置，用于对使能的放大器级的输出进行求和以获得输出信号（212）的装置。 放大器阵列的增益具有从具有第一放大级（202）使能的低增益设置的范围，通过当第一放大器级的增益从最小增益增加到最大增益时增加增益设置，第二放大器级 （201）除了第一放大器级以及第二放大器级的增益从最小增益增加到最大增益之外，还可以使能另外的放大器级，直至达到放大器阵列的最大增益设置。 启用的每个放大器级具有递减衰减的输入信号，并且待使能的最终放大器级具有完整输入信号（203）。

公开(公告)号：US07250814B2

公开(公告)日：2007-07-31

申请号：US11096854

申请日：2005-04-01

Applicant: Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

Inventor： Thomas J. Bardsley ,  Matthew R. Cordrey-Gale ,  James S. Mason ,  Philip J. Murfet ,  Gareth J. Nicholls

IPC: H03F1/14

CPC classification number: H03F3/45475 ,  H03F1/0277 ,  H03F3/211 ,  H03F3/45179 ,  H03F3/72 ,  H03F2203/45138 ,  H03G1/0029 ,  H03G1/0088 ,  H03G3/001 ,  H03G2201/103 ,  H03G2201/504

Abstract: A method of varying the gain of an amplifier and an amplifier array are provided. The amplifier array includes two or more amplifier stages (201, 202) connected in parallel with each amplifier stage having a gain control means. Input signal means (203, 204) are provided for each amplifier stage with the input signals of the amplifier stages being of different amplitude. Means for enabling and disabling an amplifier stage (216) are provided and means for summing the outputs of the enabled amplifier stages obtain an output signal (212). The gain of the amplifier array has a range from a low gain setting with a first amplifier stage (202) enabled, through increasing gain settings as the gain of the first amplifier stage is increased from a minimum to a maximum gain, a second amplifier stage (201) can then be enabled in addition to the first amplifier stage and the gain of the second amplifier stage increased from a minimum to a maximum gain, further amplifier stages are enabled as available up to a maximum gain setting for the amplifier array. Each amplifier stage that is enabled has a decreasingly attenuated input signal and a final amplifier stage to be enabled has a full input signal (203).

Abstract translation: 提供了改变放大器和放大器阵列的增益的方法。 放大器阵列包括与具有增益控制装置的每个放大器级并联连接的两个或更多个放大器级（201,202）。 为每个放大器级提供输入信号装置（203,204），放大器级的输入信号具有不同的幅度。 提供了用于启用和禁用放大器级（216）的装置，用于对使能的放大器级的输出进行求和以获得输出信号（212）的装置。 放大器阵列的增益具有从具有第一放大级（202）使能的低增益设置的范围，通过当第一放大器级的增益从最小增益增加到最大增益时增加增益设置，第二放大器级 （201）除了第一放大器级以及第二放大器级的增益从最小增益增加到最大增益之外，还可以使能另外的放大器级，直至达到放大器阵列的最大增益设置。 启用的每个放大器级具有递减衰减的输入信号，并且待使能的最终放大器级具有完整输入信号（203）。