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公开(公告)号:AU2013276134A1
公开(公告)日:2014-12-11
申请号:AU2013276134
申请日:2013-06-12
Applicant: IBM
Inventor: GREINER DAN , JACOBI CHRISTIAN , SLEGEL TIMOTHY , ROGERS ROBERT
IPC: G06F9/46
Abstract: Execution of instructions in a transactional environment is selectively controlled. A TRANSACTION BEGIN instruction initiates a transaction and includes controls that selectively indicate whether certain types of instructions are permitted to execute within the transaction. The controls include one or more of an allow access register modification control and an allow floating point operation control.
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公开(公告)号:AU2013276133A1
公开(公告)日:2014-12-11
申请号:AU2013276133
申请日:2013-06-12
Applicant: IBM
Inventor: GREINER DAN , JACOBI CHRISTIAN , SLEGEL TIMOTHY
IPC: G06F9/46
Abstract: A transaction is initiated via a transaction begin instruction. During execution of the transaction, the transaction may abort. If the transaction aborts, a determination is made as to the type of transaction. Based on the transaction being a first type of transaction, resuming execution at the transaction begin instruction, and based on the transaction being a second type, resuming execution at an instruction following the transaction begin instruction. Regardless of transaction type, resuming execution includes restoring one or more registers specified in the transaction begin instruction and discarding transactional stores. For one type of transaction, the nonconstrained transaction, the resuming includes storing information in a transaction diagnostic block.
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293.
公开(公告)号:GB2513797A
公开(公告)日:2014-11-05
申请号:GB201415054
申请日:2013-03-01
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , GSCHWIND MICHAEL KARL , SLEGEL TIMOTHY
Abstract: Copying characters of a set of terminated character data from one memory location to another memory location using parallel processing and without causing unwarranted exceptions. The character data to be copied is loaded within one or more vector registers. In particular, in one embodiment, an instruction (e.g., a Vector Load to block Boundary instruction) is used that loads data in parallel in a vector register to a specified boundary, and provides a way to determine the number of characters loaded. To determine the number of characters loaded (a count), another instruction (e.g., a Load Count to Block Boundary instruction) is used. Further, an instruction (e.g., a Vector Find Element Not Equal instruction) is used to find the index of the first delimiter character, i.e., the first termination character, such as a zero or null character within the character data. This instruction checks a plurality of bytes of data in parallel.
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公开(公告)号:GB2512799A
公开(公告)日:2014-10-08
申请号:GB201414237
申请日:2013-05-21
Applicant: IBM
Inventor: GREINER DAN , JACOBI CHRISTIAN , SLEGEL TIMOTHY , MITRAN MARCEL
Abstract: A TRANSACTION BEGIN instruction and a TRANSACTION END instruction are provided. The TRANSACTION BEGIN instruction causes either a constrained or nonconstrained transaction to be initiated, depending on a field of the instruction. The TRANSACTION END instruction ends the transaction started by the TRANSACTION BEGIN instruction.
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公开(公告)号:SG11201404862RA
公开(公告)日:2014-09-26
申请号:SG11201404862R
申请日:2013-03-07
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , SCHWARZ ERIC MARK , SLEGEL TIMOTHY , GSCHWIND MICHAEL KARL
Abstract: Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.
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公开(公告)号:AU2013233974A1
公开(公告)日:2014-09-11
申请号:AU2013233974
申请日:2013-03-01
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , GSCHWIND MICHAEL KARL , SLEGEL TIMOTHY
IPC: H03M7/40
Abstract: The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.
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公开(公告)号:AU2012373736A1
公开(公告)日:2014-09-11
申请号:AU2012373736
申请日:2012-11-15
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , GSCHWIND MICHAEL KARL , SCHWARZ ERIC MARK , SLEGEL TIMOTHY , JACOBI CHRISTIAN
IPC: G11C11/00
Abstract: A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.
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298.
公开(公告)号:AU2012373734A1
公开(公告)日:2014-09-11
申请号:AU2012373734
申请日:2012-11-15
Applicant: IBM
Inventor: BRADBURY JONATHAN DAVID , GSCHWIND MICHAEL KARL , SLEGEL TIMOTHY , SCHWARZ ERIC MARK , JACOBI CHRISTIAN
IPC: G06F12/10
Abstract: A Load to Block Boundary instruction is provided that loads a variable number of bytes of data into a register while ensuring that a specified memory boundary is not crossed. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary.
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公开(公告)号:AU2010355814B2
公开(公告)日:2014-05-15
申请号:AU2010355814
申请日:2010-11-08
Applicant: IBM
Inventor: GREINER DAN , OSISEK DAMIAN LEO , SLEGEL TIMOTHY , HELLER LISA
Abstract: In a processor supporting execution of a plurality of functions of an instruction, an instruction blocking value is set for blocking one or more of the plurality of functions, such that an attempt to execute one of the blocked functions, will result in a program exception and the instruction will not execute, however the same instruction will be able to execute any of the functions that are not blocked functions.
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300.
公开(公告)号:PL2430532T3
公开(公告)日:2014-04-30
申请号:PL10775820
申请日:2010-11-08
Applicant: IBM
Inventor: GREINER DAN , OSISEK DAMIAN LEO , SLEGEL TIMOTHY , HELLER LISA
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