公开(公告)号：US5910701A

公开(公告)日：1999-06-08

申请号：US19469

申请日：1998-02-05

Applicant: Hisashi Takemura

Inventor： Hisashi Takemura

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/319

Abstract: A field-emission cold cathode having emitters 9 formed on silicon substrate 1, and a gate electrode film 7 formed on insulation film 6 and having openings over the emitters, further includes trenches 3 formed in silicon substrate 1, a plurality of emitters formed on regions surrounded by trenches 3, and n-type regions 5 formed on the silicon substrate directly below the emitters. Breakdowns caused by field concentrations brought about by the spread of current directly below the emitters can thus be prevented, and thus the emitter pitch within regions surrounded by trenches can be determined at will. When high voltage is impressed due to a discharge, the resistance connected to the emitters prevents the flow of large currents to the emitters and the occurrence of short-circuit damage.

Abstract translation: 形成在硅衬底1上的发射体9的场致发射冷阴极和形成在绝缘膜6上并且在发射体上具有开口的栅电极膜7还包括形成在硅衬底1中的沟槽3，形成在区域上的多个发射体 被沟槽3包围，形成在发射体正下方的硅衬底上的n型区域5。 因此可以防止由直接位于发射体下方的电流扩大引起的场浓度造成的击穿，因此可以随意确定由沟槽围绕的区域内的发射极间距。 当由于放电而施加高电压时，连接到发射器的电阻防止大电流流向发射器并发生短路损坏。

公开(公告)号：US5903098A

公开(公告)日：1999-05-11

申请号：US779223

申请日：1997-01-06

Applicant: Gary W. Jones

Inventor： Gary W. Jones

IPC: G01R33/10 ,  G02B27/00 ,  G02B27/01 ,  G02B27/22 ,  G09G3/00 ,  H01J3/02 ,  H01J9/02 ,  H01J9/24 ,  H01J29/94 ,  H01J31/12 ,  H04N5/70 ,  H04N5/74 ,  H04N13/00 ,  H01J1/30

CPC classification number: G09G3/003 ,  G01R33/10 ,  G02B27/017 ,  G02B27/0172 ,  G02B27/0176 ,  G02B27/2235 ,  G09G3/02 ,  H01J29/94 ,  H01J3/022 ,  H01J31/127 ,  H01J9/025 ,  H04N13/0422 ,  H04N13/0438 ,  H04N13/044 ,  H04N13/0459 ,  H04N13/0497 ,  H04N5/7408 ,  G02B2027/0132 ,  G02B2027/0136 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2209/385 ,  H01J2329/00 ,  H04N13/0059 ,  H04N13/0285 ,  H04N13/0427 ,  H04N13/0456 ,  H04N5/70 ,  H04N5/7491

Abstract: A field emitter array device includes a ceramic substrate member having a multiplicity of through conductive vias therein. An insulative material layer is located on the ceramic substrate member. An addressable array of gate and emitter line elements is located on the insulative material and is conductively coupled to the through substrate conductive vias. A backside connector is located on the ceramic substrate member and conductively coupled to the vias for connection of the ceramic substrate member with an array driver device for the addressable array of emitter and gate line elements. A field emitter array of field emitter elements on the insulative material layer of the ceramic substrate member which are operatively coupled with the addressable array of gate and emitter line elements.

Abstract translation: 场致发射体阵列器件包括其中具有多个通孔的陶瓷衬底构件。 绝缘材料层位于陶瓷基板部件上。 栅极和发射极线元件的可寻址阵列位于绝缘材料上并与导电通孔导电耦合。 背面连接器位于陶瓷基板构件上并且导电地耦合到通孔，用于将陶瓷基板构件与用于可寻址阵列的发射极和栅极线路元件的阵列驱动器装置连接。 在陶瓷衬底构件的绝缘材料层上的场发射极元件的场发射极阵列，其与栅极和发射极线元件的可寻址阵列可操作地耦合。

公开(公告)号：US5889361A

公开(公告)日：1999-03-30

申请号：US92884

申请日：1998-06-08

Applicant: Wen Chun Wang ,  Jermmy J. M. Wang ,  Tzung-Zu Yang

Inventor： Wen Chun Wang ,  Jermmy J. M. Wang ,  Tzung-Zu Yang

IPC: H01J3/02 ,  H01J9/02 ,  H01J1/30

CPC classification number: H01J3/022 ,  H01J2201/319 ,  H01J2329/00

Abstract: A cold cathode field emission device is described. A key feature of its design is that groups of microtips share a single conductive disk with a reliable ballast resistor being interposed between each of these conductive disks and the cathode conductor. Additionally, a resistor, rather than a conductor, is used to connect the gate conductive disk to the gate electrode. The latter is arranged so as not to overlap with the cathode electrode. The cathode and gate conductive disks ensure that the ballast resistance associated with each microtip is essentially the same.

Abstract translation: 描述冷阴极场致发射器件。 其设计的一个关键特征是，一组微尖头共享一个导电盘，在这些导电盘和阴极导体之间​​插入可靠的镇流电阻。 此外，使用电阻器而不是导体将栅极导电盘连接到栅电极。 后者被布置成不与阴极重叠。 阴极和栅极导电盘确保与每个微尖端相关联的镇流电阻基本相同。

公开(公告)号：US5872422A

公开(公告)日：1999-02-16

申请号：US575485

申请日：1995-12-20

Applicant: Xueping Xu ,  Charles P. Beetz ,  George R. Brandes ,  Robert W. Boerstler ,  John W. Steinbeck

Inventor： Xueping Xu ,  Charles P. Beetz ,  George R. Brandes ,  Robert W. Boerstler ,  John W. Steinbeck

IPC: H01J1/304 ,  H01J1/30

CPC classification number: H01J1/304 ,  B82Y10/00 ,  H01J2201/30469 ,  H01J2201/319 ,  Y10S977/939

Abstract: Electron field emission devices (cold cathodes), vacuum microelectronic devices and field emission displays which incorporate cold cathodes and methods of making and using same. More specifically, cold cathode devices comprising electron emitting structures grown directly onto a substrate material. The invention also relates to patterned precursor substrates for use in fabricating field emission devices and methods of making same and also to catalytically growing other electronic structures, such as films, cones, cylinders, pyramids or the like, directly onto substrates.

Abstract translation: 包含冷阴极的电子场发射器件（冷阴极），真空微电子器件和场发射显示器及其制造和使用方法。 更具体地，包括直接生长在基底材料上的电子发射结构的冷阴极器件。 本发明还涉及用于制造场致发射器件的图案化前体衬底及其制造方法，并且还涉及直接在衬底上直接催化生长其它电子结构，例如膜，锥体，圆柱体，金字塔等。

公开(公告)号：US5872019A

公开(公告)日：1999-02-16

申请号：US718789

申请日：1996-09-24

Applicant: Jong Duk Lee ,  Hyung Soo Uh

Inventor： Jong Duk Lee ,  Hyung Soo Uh

IPC: H01J17/49 ,  H01J1/304 ,  H01J9/02 ,  H01L21/336 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78 ,  H01L21/00

CPC classification number: H01J9/025 ,  H01J2201/319 ,  H01J2329/00

Abstract: The present invention provides field emitter arrays (FEAs) having incorporated with metal oxide semiconductor field effect transistors (MOSFETs) and method for fabricating the same which realizes a simultaneous fabrication of two kinds of devices, namely, the FEA and MOSFETs, by using common processing steps among the processes of fabricating the Si-FEA or the metal FEA and the MOSFETs, wherein the method comprises steps of forming field emission tips and active regions for MOSFETs by oxidizing selected portions of the silicon nitride layer, forming a gate insulating oxide layers for the FEA and field oxide layers for MOSFETs simultaneously by the LOCOS method and connecting gate electrodes(row line) and cathode electrodes(column line) of the FEA to MOSFETs.

Abstract translation: 本发明提供了并入金属氧化物半导体场效应晶体管（MOSFET）的场发射极阵列（FEAs）及其制造方法，其通过使用共同的处理实现两种器件即FEA和MOSFET的同时制造 在制造Si-FEA或金属FEA和MOSFET的过程中的步骤，其中该方法包括以下步骤：通过氧化氮化硅层的选定部分来形成MOSFET的场致发射尖端和有源区，形成用于 通过LOCOS方法同时进行MOSFET的FEA和场氧化物层，并将FEA的栅电极（行线）和阴极（列线）连接到MOSFET。

公开(公告)号：US5866979A

公开(公告)日：1999-02-02

申请号：US897240

申请日：1997-07-18

Applicant: David A. Cathey, Jr. ,  John Lee

Inventor： David A. Cathey, Jr. ,  John Lee

IPC: G09F9/30 ,  H01J9/02 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/12 ,  H01J1/30 ,  H01J19/24

CPC classification number: H01J9/025 ,  H01J29/04 ,  H01J29/06 ,  H01J29/89 ,  H01J31/127 ,  H01J2201/319

Abstract: A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.

Abstract translation: 提供了一种制造具有改善的结漏电特性的场发射显示（FED）的方法。 该方法包括在FED的阴极发光显示屏和形成在FED的底板上的半导体结之间形成遮光元件。 光阻挡元件保护接点免受在显示屏上形成的光和在环境中产生的光的撞击。 因此，结的电气特性保持恒定，并且提高结漏电。 遮光元件可以形成为不透明的光吸收或光反射层。 此外，遮光元件可以被图案化以保护基板的预定区域并且可以提供诸如互连层的其它电路功能。

公开(公告)号：US5847407A

公开(公告)日：1998-12-08

申请号：US794559

申请日：1997-02-03

Applicant: Rodolfo Lucero ,  Robert T. Smith ,  Lawrence N. Dworsky

Inventor： Rodolfo Lucero ,  Robert T. Smith ,  Lawrence N. Dworsky

IPC: H01J1/304 ,  H01L29/66 ,  H01L29/06 ,  H01L29/12

CPC classification number: H01J1/3042 ,  H01J31/127 ,  H01J2201/319

Abstract: A charge dissipation field emission device (200, 300, 400) includes a supporting substrate (210, 310, 410), a cathode (215, 315, 415) formed thereon, a dielectric layer (240, 340, 440) formed on the cathode (215, 315, 415) and having emitter wells (260, 360, 460) and a charge dissipation well (252, 352, 452, 453) exposing a charge-collecting surface (248, 348, 448, 449), for bleeding off gaseous positive charge generated during the operation of the charge dissipation field emission device (200, 300, 400), an electron emitter (270, 370, 470) formed in each of the emitter wells (260, 360, 460), and an anode (280, 380, 480) spaced from the dielectric layer (240, 340, 440) for collecting electrons emitted by the electron emitters (270, 370, 470).

Abstract translation: 电荷耗散场发射装置（200,300,400）包括支撑衬底（210,310,410），形成在其上的阴极（215,315,415），形成在其上的电介质层（240,340,440） 阴极（215,315,445）并具有暴露电荷收集表面（248,348,448,449）的发射极阱（260,360,460）和电荷耗散阱（252,352,452,453），用于 在电荷耗散场致发射器件（200,300,400）的操作期间产生的气态正电荷渗出，形成在每个发射极阱（260,360,460）中的电子发射器（270,370,470），以及 与所述电介质层（240,340,440）间隔开用于收集由所述电子发射器（270,370,470）发射的电子的阳极（280,380,480）。

公开(公告)号：US5834900A

公开(公告)日：1998-11-10

申请号：US834177

申请日：1997-04-15

Applicant: Mitsuru Tanaka ,  Kazuyuki Suzuki

Inventor： Mitsuru Tanaka ,  Kazuyuki Suzuki

IPC: G09G3/22 ,  H01J1/304 ,  H01J29/04 ,  H01J31/12 ,  G09G3/10

CPC classification number: G09G3/22 ,  H01J1/3042 ,  G09G2320/029 ,  G09G2320/04 ,  G09G2320/041 ,  H01J2201/319

Abstract: A field emission type display device capable of preventing a variation in luminance of the display device due to a variation in ambient temperature. A resistive layer is formed on cathode electrodes arranged in a display region and conical emitters are arranged on the resistive layer. The resistive layer is made of a semiconductor material, resulting in being varied in resistance depending on a temperature. A monitor resistive pattern made of the same material as the resistive layer is arranged so as to measure the resistance variation in the form of a voltage variation through an OP amplifier 11, which is then fed to the control circuit. The control circuit controls a gate voltage depending on the resistance to prevent a variation in luminance of the display device.

Abstract translation: 一种能够防止由于环境温度变化引起的显示装置的亮度变化的场发射型显示装置。 电阻层形成在布置在显示区域中的阴极上，锥形发射体布置在电阻层上。 电阻层由半导体材料制成，导致根据温度的电阻变化。 布置由与电阻层相同的材料制成的监视器电阻图案，以便测量通过OP放大器11的电压变化形式的电阻变化，然后将其馈送到控制电路。 控制电路根据电阻控制栅极电压，以防止显示装置的亮度变化。

公开(公告)号：US5813892A

公开(公告)日：1998-09-29

申请号：US678565

申请日：1996-07-12

Applicant: Christopher J. Spindt ,  John M. Macaulay

Inventor： Christopher J. Spindt ,  John M. Macaulay

IPC: H01J1/304 ,  H01J3/02 ,  H01J9/02

CPC classification number: B82Y10/00 ,  H01J1/3042 ,  H01J3/022 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457 ,  H01J2201/319

Abstract: A gated electron-emitter is fabricated according to the process in which charged particles are directed towards a track-susceptible layer (48) to form charged-particle tracks (50B.sub.1) through the track-susceptible layer. Apertures (52.sub.1) are formed through the track-susceptible layer by etching along the charged-particle tracks. A gate layer (46) is etched through the apertures to form gate openings (54.sub.1) through the gate layer. An insulating layer (24) is etched through the gate openings to form dielectric open spaces (56.sub.1, 94.sub.1, 106.sub.1, or 114.sub.1) through the insulating layer down to a resistive layer (22B) of an underlying conductive region (22). Electron-emissive elements (30B, 30/88D.sub.1, 98/102.sub.1, or 118.sub.1) are formed in the dielectric open spaces over the resistive layer.

Abstract translation: 根据其中带电粒子指向轨道敏感层（48）以通过轨道敏感层形成带电粒子轨迹（50B1）的工艺制造门控电子发射器。 通过沿着带电粒子轨迹的蚀刻，通过轨道敏感层形成孔径（521）。 通过孔径蚀刻栅极层（46），以形成通过栅极层的栅极开口（541）。 通过栅极开口蚀刻绝缘层（24），以形成通过绝缘层的下行导电区域（22）的电阻层（22B）的电介质开放空间（561,941,1061或1141）。 在电阻层上的电介质开放空间中形成电子发射元件（30B，30 / 88D1,98 / 1011或1181）。

公开(公告)号：US5804910A

公开(公告)日：1998-09-08

申请号：US599443

申请日：1996-01-18

Applicant: Kevin Tjaden ,  James J. Alwan

Inventor： Kevin Tjaden ,  James J. Alwan

IPC: H01J1/304 ,  H01J1/30

CPC classification number: H01J1/3042 ,  H01J2201/304 ,  H01J2201/319

Abstract: A cold cathode structure, useful for field emission displays, is disclosed. A thin resistive silicon film is disposed on a glass substrate; conductive emitter tips are disposed on top thereof. An alloy of amorphous silicon and amorphous carbon is used for the emitter tips. The proportion of the carbon in the alloy increases, gradually or abruptly, from the base to the top of the emitter tips. The carbon gradient is implemented during the process step, in which an n-type silicon layer is formed from which the emitter tips are made in subsequent masking and etching steps. The amount of carbon makes the emitter tips harder and gives lower work function at greater stability. Moreover, the carbon gradient allows for additional sharpening of the emitter tips.

Abstract translation: 公开了一种用于场发射显示器的冷阴极结构。 薄电阻硅膜设置在玻璃基板上; 导电发射极尖端设置在其顶部。 非晶硅和无定形碳的合金用于发射极尖端。 合金中碳的比例逐渐或突然地从发射极尖端的基极向顶部增加。 碳梯度在工艺步骤中实现，其中形成n型硅层，在其后面的掩模和蚀刻步骤中制成发射极尖端。 碳的量使得发射极尖端更硬，并且在更高的稳定性下赋予更低的功函数。 此外，碳梯度允许发射器尖端的额外的锐化。