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    Data storage system architecture
    341.
    发明授权
    Data storage system architecture 失效
    数据存储系统架构

    公开(公告)号：EP0646858B1

    公开(公告)日：1998-04-15

    申请号：EP94306322.2

    申请日：1994-08-26

    Applicant: NCR International, Inc. ,  HYUNDAI ELECTRONICS AMERICA ,  SYMBIOS LOGIC INC.

    Inventor： DuLac, Keith Bernard

    IPC: G06F3/06 ,  G06F13/40 ,  G06F11/20

    CPC classification number: G06F11/201 ,  G06F3/0601 ,  G06F11/1012 ,  G06F2003/0692 ,  G11C29/88

    Abstract: A data storage system comprises a matrix of intelligent storage nodes interconnected to communicate with each other via a network of busses (Ro-Rm,Co-Cn). The network of busses includes a plurality of first busses (Ro-Rm) for conducting data from and to a corresponding plurality of host system processors (Ho-Hm) and a plurality of second busses (Co-Cn), each one of the second busses intersecting with each one of the first busses. The nodes are located at each intersection. The storage nodes each include a data storage device (D), such as a magnetic disk drive unit, a processor (P) and buffer memory (B1-B3), whereby the node processor controls the storage and retrieval of data at the node as well as being capable of co-ordinating the storage and retrieval of data at other nodes within the network.

    FAILURE-TOLERANT MASS STORAGE SYSTEM
    342.
    发明授权
    FAILURE-TOLERANT MASS STORAGE SYSTEM 失效
    容错存储系统

    公开(公告)号：EP0532514B1

    公开(公告)日：1997-11-26

    申请号：EP91908123.2

    申请日：1991-04-03

    Applicant: MICRO TECHNOLOGY, INC.

    Inventor： HENSON, Larry, P. ,  GAJJAR, Kumar ,  POWERS, David, T. ,  IDLEMAN, Thomas, E.

    IPC: G06F11/20 ,  H04J15/00

    CPC classification number: G06F11/10 ,  G06F11/0757 ,  G06F11/1076 ,  G06F11/1666 ,  G06F11/20 ,  G06F11/201 ,  G06F11/2089 ,  G06F11/2094 ,  G06F2211/1057 ,  G11B20/1833

    Abstract: A mass memory system for digital computers is disclosed. The system has a plurality of disk drives (250-255) coupled to a plurality of small buffers (240-245). An Error Correction Controller (260 and 270) is coupled to a plurality of X-bar switches (210-215), the X-bar switches being connected between each disk drive and its buffers. Data is read from and written to the disk drives in parallel and error correction is also performed in parallel. The X-bar switches are used to couple and decouple functional and nonfunctional disk drives to the system as necessary. Likewise, the buffers can be disconnected from the system should they fail. The parallel architecture, combined with a Reed-Solomon error detection and correction scheme and X-bar switches allows the system to tolerate and correct any two failed drives, allowing for high fault-tolerance operation.

    Array of disk drives with redundant channels
    343.
    发明授权
    Array of disk drives with redundant channels 失效
    与冗余通道驱动矩阵

    公开(公告)号：EP0550853B1

    公开(公告)日：1997-07-30

    申请号：EP92121378.1

    申请日：1992-12-16

    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

    Inventor： Baba, Hiroshi, c/o Mitsubishi Denki K.K.

    IPC: G06F11/20 ,  G06F3/06

    CPC classification number: G06F11/201 ,  G11C29/88

    Abstract: An array of disk drives stores information which is accessed through multiple channels by a host computer. Different channels are coupled to different sequences of disk drives. Different disk drives can be accessed simultaneously through different channels, enabling high data transfer rates. The same disk drive can be accessed through two different channels, enabling access even if one of the channels is busy or malfunctioning. According to one aspect of the invention the channels are divided into at least two mutually exclusive sets of channels, each set providing access to all the disk drives.

    EP0517857A4 -
    345.
    发明公开
    EP0517857A4 - 失效
    EP0517857A4 - Google专利

    公开(公告)号：EP0517857A4

    公开(公告)日：1995-06-07

    申请号：EP91907076

    申请日：1991-02-28

    Applicant: SF2 CORP

    Inventor： IDLEMAN THOMAS E ,  KOONTZ ROBERT S ,  POWERS DAVID T ,  JAFFE DAVID H ,  HENSON LARRY P ,  GLIDER JOSEPH S ,  GAJJAR KUMAR

    IPC: G06F3/06 ,  G06F11/00 ,  G06F11/10 ,  G06F11/20 ,  G11B20/18 ,  G06F7/22

    CPC classification number: G06F11/10 ,  G06F11/0757 ,  G06F11/1008 ,  G06F11/1076 ,  G06F11/1666 ,  G06F11/20 ,  G06F11/201 ,  G06F11/2089 ,  G06F11/2094 ,  G11B20/1833

    Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remain constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily contolled by the failed second level controller. In addition, the invention provides error check and correction as well as mass storage device configuration circuitry.

    Abstract translation: 一种用于控制计算机和以特定逻辑配置排列的一组存储设备之间的数据流的方法和设备。 该系统包括一组第一级控制器和一组第二级控制器。 第一级控制器和第二级控制器一起工作，使得如果第二级控制器之一发生故障，则第一级控制器和存储器设备之间的路由切换到正常运行的第二级控制器，而不需要使计算机进入 重新路由过程。 内存设备的逻辑配置保持不变。 本发明还包括开关电路，其允许功能第二级控制器采取以前主要由失效的第二级控制器控制的一组存储器设备的控制。 另外，本发明提供错误检查和校正以及大容量存储设备配置电路。

    FAILURE-TOLERANT MASS STORAGE SYSTEM
    346.
    发明公开
    FAILURE-TOLERANT MASS STORAGE SYSTEM 失效
    容错海量存储系统。

    公开(公告)号：EP0532514A1

    公开(公告)日：1993-03-24

    申请号：EP91908123.0

    申请日：1991-04-03

    Applicant: MICRO TECHNOLOGY, INC.

    Inventor： HENSON, Larry, P. ,  GAJJAR, Kumar ,  POWERS, David, T. ,  IDLEMAN, Thomas, E.

    IPC: G06F11 ,  G11B20

    CPC classification number: G06F11/10 ,  G06F11/0757 ,  G06F11/1076 ,  G06F11/1666 ,  G06F11/20 ,  G06F11/201 ,  G06F11/2089 ,  G06F11/2094 ,  G06F2211/1057 ,  G11B20/1833

    Abstract: Système de mémoire de grande capacité pour ordinateur numérique, comprenant plusieurs unités de disques (250-255) couplées à plusieurs petits tampons (240-245). Une unité de contrôle de correction d'erreur (260 et 270) est reliée à plusieurs commutateurs à barres croisées (210-215), lesquels sont connectés entre chaque unité de disques et ses tampons. Les données sont lues à partir des unités de disques et inscrites sur celles-ci en parallèle et les corrections d'erreur s'effectuent aussi en parallèle. Les commutateurs à barres croisées servent à coupler et découpler par rapport au système, autant que de besoin, les unités de disques fonctionnelles et non fonctionnelles. De même, les tampons peuvent être déconnectés du système s'ils sont défaillants. L'architecture parallèle, combinée à un dispositif de dépistage et de correction d'erreur Reed-Solomon et à des commutateurs à barres croisées, permet au système de supporter et compenser la défaillance de deux unités, quelles qu'elles soient, ce qui lui confère une capacité de tolérance élevée aux défaillances.

    Peripheral device initiated partial system reconfiguration
    347.
    发明公开
    Peripheral device initiated partial system reconfiguration 失效
    外围设备启动的部分系统重新配置

    公开(公告)号：EP0308056A2

    公开(公告)日：1989-03-22

    申请号：EP88307202.7

    申请日：1988-08-04

    Applicant: International Business Machines Corporation

    Inventor： Beardsley, Brent Cameron ,  Hefferon, Eugene Paul ,  Lynch, Kenneth Robert ,  Shipman, Lloyd R., Jr.

    IPC: G06F15/16 ,  G06F11/00 ,  G06F11/20

    CPC classification number: G06F11/142 ,  G06F11/20 ,  G06F11/201

    Abstract: A data processing system includes a plurality of host systems and peripheral subsystems, particularly data storage subsystems. Each of the data storage subsystems includes a plurality of control units attaching a plurality of data storage devices such as direct access storage devices (DASD) for storing data on behalf of the various host systems. Each of the control units have a separate storage path for accessing the peripheral data storage devices using dynamic pathing. The storage paths can be clustered into power clusters. Maintenance personnel acting through maintenance panels on either the control units or the peripheral data storage devices activate the sub-system to request reconfiguration of the sub-system from all of the host systems connected to the sub-system. The host systems can honour the request or reject it based upon diverse criteria. Upon each of the host systems approving the reconfiguration, the sub-system 13 is reconfigured for maintenance purposes. Upon completion of the maintenance procedures, a second reconfiguration request is sent to the host systems for causing quiesce devices to resume normal operations.

    Abstract translation: 数据处理系统包括多个主机系统和外围子系统，特别是数据存储子系统。 每个数据存储子系统包括附加多个数据存储设备的多个控制单元，诸如代表各种主机系统存储数据的直接存取存储设备（DASD）。 每个控制单元具有单独的存储路径，用于使用动态路径访问外围数据存储设备。 存储路径可以集群到电源集群中。 维护人员通过控制单元或外围数据存储设备上的维护面板激活子系统，请求从连接到子系统的所有主机系统重新配置子系统。 主机系统可以根据不同的标准来接受请求或拒绝请求。 在每个主机系统批准重新配置时，子系统13被重新配置以用于维护目的。 在完成维护程序后，将第二个重新配置请求发送到主机系统，以使静默设备恢复正常操作。

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