DEVICE AND METHOD FOR CALIBRATING MEASURING SYSTEM

    公开(公告)号:JPH0712598A

    公开(公告)日:1995-01-17

    申请号:JP10452894

    申请日:1994-04-20

    Applicant: ADE CORP

    Abstract: PURPOSE: To output a calibrated measurement signal showing a characteristic by providing a signal conversion/conditioning circuit for conditioning a tranducer output by combination of parameters involved in both to be converted to an intermediate signal having a voltage amplitude related to the characteristic of an object. CONSTITUTION: A measurement circuit 14 has an object 12, and a transducer 20 such as a capacity type probe, and further has a signal conversion/ conditioning circuit 22. A front end circuit 22a of the circuit 22 converts a capacitance shown by a transducer output signal 27 to an intermediate signal having a voltage amplitude related to the distance between the tranducer 20 and the object 12. A signal conditioning circuit 22b processes a signal 29 to output a calibrated measurement value signal 32, which is displayed for a user by a display/post-processing circuit 16. The tranducer 20 has parameters (a), (b), and the circuit 22a has parameters (c), (d), and is controlled according to the fluctuation by adjustable constitutive parts 30a, 30b which the circuit 22 has. Thus, the need of controlling the whole system each sub-system can be eliminated.

    ALIGNMENT DEVICE AND METHOD OF ELEMENT TRANSFER AND ALIGNMENT DEVICE OF ELEMENT

    公开(公告)号:JPH02311288A

    公开(公告)日:1990-12-26

    申请号:JP4084390

    申请日:1990-02-21

    Applicant: ADE CORP

    Abstract: PURPOSE: To coincide the center point of an element with a reference point by providing a means for aligning the element in a first motion direction along a predetermined straight line when the misalignment of the element is along the straight line and moving the element on an element holder in a linear direction as the function of misalignment. CONSTITUTION: A wafer 22 is disposed so as to generate misalignment along a predetermined linear direction, and the first motion direction of a holder 20, a second motion direction around an axis and a third motion direction in a vertical direction are created by a linear manipulator having the holder 20 on two articulated leg arms 14 and 16 and a means for bending the legs of the arms. Then, if the misalignment of the wafer 22 is along a straight line, the wafer is aligned with the first motion direction along a predetermined straight line, and the wafer 22 gripped by the holder 20 is moved in a linear direction as the function of the misalignment.

    Apparatus and method for direct readout of capacitively gauged dimensions
    34.
    发明授权
    Apparatus and method for direct readout of capacitively gauged dimensions 失效
    用于直观读取容量尺寸的装置和方法

    公开(公告)号:US3775679A

    公开(公告)日:1973-11-27

    申请号:US3775679D

    申请日:1971-12-09

    Applicant: ADE CORP

    Inventor: ABBE R

    CPC classification number: G01B7/12 G01B7/023 G01B7/08 G01R17/00

    Abstract: An electronics system and method for processing the output of a dimension sensing capacitive gauge or probe having a measured capacitance between electrodes. Control of the capacitive gauge''s output through control of its excitation allows a parameter of the excitations output to be used as an indication directly proportional to a dimension, typically electrode separation, which varies inversely with the capacitance between the electrodes. An output from a second similar gauge is used to deflect a meter for a direct indication of the dimension. Alternatively a second excitation for the second gauge is provided with its output used to control the first excitation whereby the frequency ratio of the two excitations provides a direction indication of the dimension and is easily digitized. Environmentally induced changes in either gauge are balanced by proximity of the gauges and the excitation amplitude is regulated.

    Abstract translation: 一种用于处理在电极之间具有测量的电容的尺寸感测电容式计量器或探针的输出的电子系统和方法。 通过控制其激励来控制电容式测量仪的输出允许激励输出的参数用作与电极直接成比例的指示,通常与电极间的电容成反比的电极间隔。 来自第二个类似量规的输出用于偏转仪表以直接指示尺寸。 或者,用于第二量规的第二激励被提供有其用于控制​​第一激励的输出,由此两个激励的频率比提供尺寸的方向指示并且容易数字化。 任何一个量规的环境诱导变化由量规的接近度进行平衡,并且调节激励振幅。

    Impedance comparing circuit with ground referenced readout and stray capacitance insensitivity
    35.
    发明授权
    Impedance comparing circuit with ground referenced readout and stray capacitance insensitivity 失效
    阻抗比较电路与地面参考读出和走势电容灵敏度

    公开(公告)号:US3775678A

    公开(公告)日:1973-11-27

    申请号:US3775678D

    申请日:1971-12-09

    Applicant: ADE CORP

    Inventor: ABBE R

    CPC classification number: G01R27/02

    Abstract: An impedance comparing circuit for supplying excitation to equal or unequal reference and sensing impedances with a ground referenced output signal indicative of the difference between impedances. A diode matrix excites the reference and sensing impedances from an oscillator through first and second DC blocking impedances respectively during one polarity of current and in the reverse relationship during the opposite polarity of current. Low impedance values in the first and second impedances provide near equality in the voltage across the reference and sensing impedances and minimize the effect of capacitance between them. Tuning or increased diode matrix impedances will augment the sensitivity at a sacrifice in the elimination of the effect of capacitance between the reference and sensing impedances.

    Abstract translation: 阻抗比较电路,用于向参考和感测阻抗相等或不相等的参考输出信号提供表示阻抗之间的差异的阻抗比较电路。 二极管矩阵在电流的一个极性和相反的电流极性期间分别激发来自振荡器的参考和感测阻抗通过第一和第二DC阻塞阻抗。 第一和第二阻抗中的低阻抗值在参考电压和感测阻抗之间的电压中几乎相等,并使电容的影响最小化。 调整或增加的二极管阵列阻抗将增加在消除参考和感测阻抗之间电容的影响时的灵敏度。

    Wafer handling, and processing system therefor
    36.
    发明专利
    Wafer handling, and processing system therefor 有权
    水处理及其加工系统

    公开(公告)号:JP2005252273A

    公开(公告)日:2005-09-15

    申请号:JP2005076211

    申请日:2005-03-17

    Abstract: PROBLEM TO BE SOLVED: To provide a system that is improved to avoid the impairment or the contamination of a wafer when it is handled, processed, or measured.
    SOLUTION: Vertical type wafer processed equipment is prepared, and only the edge of a wafer is brought into contact with it. If a wafer is handled vertically, air flows such that it vertically crosses it, and thus, contamination by minute particles partially decreases. The distortion of the wafer may be caused by its gravity when it is handled horizontally, but this can be decreased by handling the wafer vertically. If contact with the wafer is limited to its edge, potentially harmful influences by the contact such as contamination or a damage are conveniently decreased. Further, if the wafer is handled at its edge part, both sides of the wafer can be made to serve as an effective range for measurement.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种改进的系统,以避免在处理,处理或测量晶片时的损坏或污染。

    解决方案:制备垂直型晶片加工设备,只有晶片的边缘与其接触。 如果晶片被垂直地处理,则空气流动使得其垂直地穿过它,因此微粒子的污染部分地减少。 当晶片处理水平时,晶片的变形可能由其重力引起,但是可以通过垂直处理晶片来降低晶片的变形。 如果与晶片的接触被限制在其边缘,则接触的潜在有害影响(例如污染或损坏)方便地降低。 此外,如果在其边缘部分处理晶片,则可以使晶片的两侧用作测量的有效范围。 版权所有(C)2005,JPO&NCIPI

    Extended defect sizing
    40.
    发明专利
    Extended defect sizing 有权
    扩展缺陷尺寸

    公开(公告)号:JP2005208042A

    公开(公告)日:2005-08-04

    申请号:JP2004308470

    申请日:2004-10-22

    CPC classification number: G01N21/9501

    Abstract: PROBLEM TO BE SOLVED: To provide a system and method of inspecting semiconductor wafers capable of determining the height of a defect on a wafer surface whether or not the scattering power associated with the defect exceeds the dynamic range of the system.
    SOLUTION: In the wafer defect inspection system, when the defect on the wafer surface is detected, the three-dimensional shape of the defect is regarded as a Gaussian shape. A plurality of cross-sectional areas of the Gaussian shape are defined, a respective value of each cross-sectional area is determined, and a respective value of the natural logarithm of intermediate heights of the Gaussian shape corresponding to the cross-sectional areas is determined. The cross-sectional area values are plotted as a function of the natural logarithm of the intermediate height values to form a substantially linear plot, a natural logarithm of the height value corresponding to a zero area value based on the substantially linear plot is determined, and the inverse natural logarithm of the value is determined to obtain the height of the Gaussian shape.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种检查能够确定晶片表面上的缺陷的高度的半导体晶片的系统和方法,无论与缺陷相关联的散射功率是否超过系统的动态范围。 解决方案:在晶片缺陷检查系统中,当检测到晶片表面上的缺陷时,缺陷的三维形状被认为是高斯形状。 定义高斯形状的多个横截面面积,确定每个横截面积的相应值,并且确定与横截面积对应的高斯形状的中间高度的自然对数的相应值 。 将横截面积值绘制为中间高度值的自然对数的函数以形成基本上线性的图,确定基于基本上线性的绘图对应于零面积值的高度值的自然对数,以及 确定该值的反自然对数以获得高斯形状的高度。 版权所有(C)2005,JPO&NCIPI

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