公开(公告)号：JPH09185896A

公开(公告)日：1997-07-15

申请号：JP28642896

申请日：1996-10-29

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： REI PINKAMU

IPC: G11C11/401 ,  G11C29/00 ,  G11C29/04

Abstract: PROBLEM TO BE SOLVED: To reduce the manufacture and processing cost and to decrease a die area by generating a redundancy address selection signal when a received address is the same as a prescribed redundancy address. SOLUTION: A random access memory (RAM) address comparator circuit 31 and a sequential access memory(SAM) address comparator circuit 60 are used to allow a fuse programming circuit 30 to be used in common between a RAM 12 and a SAM 14. The circuit 30 uses fuses F1, F2 for two bits of an address line. A counter bit corresponding to the address bit fed to the comparator circuit 31 is fed to the comparator circuit 60. As a result, outputs from NOR gates 40-60 in the circuit 30 are fed directly to the comparator circuit 60 and separate circuits for the memory devices RAM and SAM are not required.

公开(公告)号：JP2000029699A

公开(公告)日：2000-01-28

申请号：JP18609699

申请日：1999-06-30

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： POPESCU VALERI ,  SCHULTZ MERLE A ,  GIBSON GARY A ,  SPRACKLEN JOHN E ,  LIGHTNER BRUCE D

IPC: G06F9/38

Abstract: PROBLEM TO BE SOLVED: To prevent the performance of a processor from being deteriorated due to that instruction fetching operation is separated from instruction execution by using a dynamic register file to generate an instruction queue (array) generating mechanism. SOLUTION: A fetcher 9 manages branching in such a style that the execution is not stopped when branching is disabled. The condition code of branching is set with an instruction which corrects the condition code. Therefore, when the instruction for correcting the condition code is fed, the fetcher 9 invalidates a condition code register by giving a locked bit thereto. On a branch shelving unit 13, the branch instruction waits until the condition code becomes usable and once branching is shelved, the fetcher 9 makes a decision according to preliminary bits in the direction where an instruction steam should advance from the position, i.e., the direction where the highest probability of the continuous execution of the program is obtained.

公开(公告)号：JPH10228417A

公开(公告)日：1998-08-25

申请号：JP31189397

申请日：1997-11-13

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： TALBOT GERRY R ,  HYPHER AUSTEN J

IPC: G06F12/06 ,  G06F13/16 ,  G06F15/177

Abstract: PROBLEM TO BE SOLVED: To control an access to a memory subsystem to maximize bandwidth and parallel property by selecting a request that accesses a usable memory position among plural requests and scheduling the selected request. SOLUTION: Processors P1(223) to P4(226) generate a request for a memory subsystem 216 to a 1st memory bus 211. Processors P5(227) to P8(230) generates a request for the subsystem 216 to a 2nd memory bus 212. A controller/crossbar switch 213 makes routing of a memory request from the two memory buses 211 and 212 to a 3rd bus 215. A request resequencing unit 214 accepts a request from the bus 215 and schedules the request. The sequence to be scheduled is controlled so that a memory access request may perform service.

公开(公告)号：JPH09167958A

公开(公告)日：1997-06-24

申请号：JP28642996

申请日：1996-10-29

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： REI PINKAMU

IPC: H03K19/00 ,  G11C7/10 ,  H03K17/06 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/0185

Abstract: PROBLEM TO BE SOLVED: To configure an output driver stage only with NMOS transistors(TRs) by allowing an overvoltage generator between an input line and an output stage to boost an input signal to a 2nd voltage before the input signal reaches the signal output stage and allowing a recovery circuit recovers the voltage of the signal to the 2nd voltage at each transition of low to high voltage. SOLUTION: A switching circuit 40 and a recovery circuit 41 control each gate of NMOS pull-up and pull-down TRs N11, N13 at an output stage of an output driver circuit 38. The circuit 40 sets a level of a node 54 to a low level in response to the transition of low to high level of an input signal IN to turn off a TRN 13 and to allow TRs N15-N20, P5, P6 to apply an overvoltage VPP to a gate of the TRN11. Furthermore, the circuit 41 acts like recovering the voltage VPP in response to both high to low and low to high level transition of the signal IN thereby decreasing the VPP pumping voltage and the capacitance of capacitors N26, N27. Thus, the small sized efficient output drive stage employing the NMOS TRs is realized, by which attenuation of the voltage VPP is avoided.

公开(公告)号：JP2002016157A

公开(公告)日：2002-01-18

申请号：JP2001154036

申请日：2001-05-23

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： HSINGYA ARTHUR WANG ,  YOUNG JEIN-CHEN ,  MING-SANG KWAN ,  IIYUN CHOI

IPC: H01L21/8238 ,  H01L21/8247 ,  H01L27/092 ,  H01L27/10 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a flash memory cell which operates at a lower potential. SOLUTION: A flash memory cell is favorably manufactured within a silicon substrate 20. The substrate 20 is a P-conductivity silicon substrate and an N- conductivity silicon well 22 is formed in the P-type substrate 20. A P- conductivity well 24 is formed in the well 22. A source 27 and a drain 26 are formed in the well 24 along with an additionally doped region 28 for bringing into contact electrically the source 28 and the drain 26 with the well 24. A flowing gate 29 and a control gate 21 are provided on the substrate 20 and moreover, a contact 25 to the well 22 is provided for enabling to bias the well 22.

公开(公告)号：JP2000057956A

公开(公告)日：2000-02-25

申请号：JP17446799

申请日：1999-05-18

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： KYUN CHEOI CHOI

IPC: H01J9/02 ,  H01J9/26 ,  H01J17/49 ,  H01J17/04

Abstract: PROBLEM TO BE SOLVED: To produce a color DC-type plasma display panel having a plurality of sub-pixels organized in a matrix formation. SOLUTION: A plurality of cathode columns 506 are formed on a first substrate, and a plurality of holes 510 are drilled with interval along the cathode columns, preferably, one hole is contained for each sub-pixel 520. A dielectric layer 508 covers the cathode columns and the substrate, and the plurality of holes 510 corresponding to the holes in cathodes are formed in the dielectric layer. A plurality of anode columns 516 longitudinally extending on a second substrate are formed in channels 514 between a plurality of barrier rib columns 512. A first and second plates are interconnected, and the anode columns are set orthogonal to the cathode columns. Cells of the sub-pixels are formed at places where the anode columns cross the cathode columns, especially, places where anodes cross the upper part or periphery of holes in the cathodes, or its periphery.

公开(公告)号：JPH11328672A

公开(公告)日：1999-11-30

申请号：JP9841499

申请日：1999-04-06

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： CHU SAI

IPC: G11B5/84 ,  C25F3/02

Abstract: PROBLEM TO BE SOLVED: To sputter clean a magnetic disk without adversely influencing magnetic characteristics of the disk by introducing the magnetic disk into a magnetron-assisted DC plasma chamber, introducing a rare gas into a vacuum chamber, feeding electricity to a target, bringing about a DC glow discharge in the vacuum chamber and etching the magnetic disk with the impression of a negative voltage. SOLUTION: A magnetic disk 34 is introduced into a vacuum chamber 12 in a magnetron-assisted DC plasma etching chamber 10, and a rare gas is introduced. Electricity is supplied to targets 16, 18 from a target power source 20, thereby bringing about a DC glow discharge. A negative voltage is impressed to the magnetic disk 34 from a DC bias power source 22. Magnetic fields of magnets 24-30 catch electrons near the targets 16, 18, with increasing an ionization effect during the glow discharge. Metallic electrons and a part of the rare gas emitted from the targets 16, 18 collide with a surface of the magnetic disk 34, applying a light shock to particles adhering to the surface. The surface is accordingly cleaned.

公开(公告)号：JPH10285185A

公开(公告)日：1998-10-23

申请号：JP35966797

申请日：1997-12-26

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： KING MERRIL K

IPC: H04Q3/00 ,  H04L12/56 ,  H04Q11/04 ,  H04L12/28

Abstract: PROBLEM TO BE SOLVED: To appropriately distribute bandwidth which is utilized among plural connections and to make each connection accept at least bandwidth of an appropriate amount without exceeding the limits of negotiated bandwidth. SOLUTION: A transmission scheduler 22 maps a connection to a time slot so that burst in an output cell stream may be minimally suppressed, the smoothness of the cell stream reduces the possibility of transmission loss, and also one connection surely never exceeds the limits of one bandwidth that is previously established. A list about transmission cells is maintained and each list is allocated to one bandwidth factor. The entire bandwidth of an ATM network is divided into time slots according to the bandwidth factors that are established, and different bandwidth crosses the entire bandwidth and is multiplexed. A cell for transmission is selected from a cell list according to a usable time slot and its bandwidth factor.

公开(公告)号：JPH10285184A

公开(公告)日：1998-10-23

申请号：JP35966697

申请日：1997-12-26

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： WILLS JEFFREY MERLIN

IPC: H04L29/06 ,  H04L12/46 ,  H04L12/851 ,  H04Q3/00 ,  H04L12/28

Abstract: PROBLEM TO BE SOLVED: To provide a multiplexer/demultiplexer which transfers information to/from a fast broadband network through a slow switch structure. SOLUTION: A fast ATM cell is sent to an ATM-switch converter 24 and interprets an ATM header into a switch format header. A cell is sent to a splitter 26 and here, the cell is sent to four output ports 28. Each port operates in 622 Mbps. A sequencer circuit 30 accepts the cells from the ports 29 and integrates them into a single cell stream. Cells from connections that are divided from plural paths in a structure are united so as to have a sequence at an outputting part which is the same with when they arrive. A switch-ATM converter 32 translate the switch format header of the cell from the sequencer into an ATM header, and a SONET transmitter 34 inserts the cell into a frame and generates an STS-48C stream.

公开(公告)号：JPH076389A

公开(公告)日：1995-01-10

申请号：JP165594

申请日：1994-01-12

Applicant: HYUNDAI ELECTRONICS AMERICA

Inventor： MAATEIN MATSUKIYASURIN ,  BURATSUDO JIYONSON

IPC: G11B7/09

Abstract: PURPOSE: To provide an actuator having component parts of very high stiffness and light in weight by using a fine position setting level actuator. CONSTITUTION: A motor M of a disk drive 1 rotates a spindle S and a disk D at a comparatively high speed. A position setting actuator A sets the position of a carriage C on a position that a laser beam B is projected on a specified track or its neighborfood of a disk surface 7 on which information is to be read, recorded or erased. The light beam B is exactly positioned on a track by moving a lens 16 in the radial direction to the carriage C by means of a fine position setting actuator 10 and the lens 16 is positioned at a desired vertical distance from the disk surface 7 so as to converge the beam B. In the actuator 10, more than half of coils of a coil assembly has an active area, a current in the area interacts with a first magnetic field and exerts force on a lens part.