Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.
Abstract:
Fabrication methods and structures relating to backplanes for back contact solar cells that provide for solar cell substrate reinforcement and electrical interconnects are described. The method comprises depositing an interdigitated pattern of base electrodes and emitter electrodes on a backside surface of a semiconductor substrate, attaching a prepeg backplane to the interdigitated pattern of base electrodes and emitter electrodes, forming holes in the prepeg backplane which provide access to the first layer of electrically conductive metal, and depositing a second layer of electrically conductive metal on the backside surface of the prepeg backplane forming an electrical interconnect with the first layer of electrically conductive metal through the holes in the prepeg backplane.
Abstract:
This disclosure enables gas recovery and utilization for use in deposition systems and processes. The system includes a thin-film semiconductor layer deposition system comprising a deposition reactor, precursor gas feeds, and a gas recovery system.
Abstract:
Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.
Abstract:
The disclosed subject matter provides a method and structure for obtaining ultra-low surface recombination velocities from highly efficient surface passivation in crystalline silicon substrate- based solar cells by utilizing a bi-layer passivation scheme which also works as an efficient ARC. The bi-layer passivation consists of a first thin layer of wet chemical oxide or a thin hydrogenated amorphous silicon layer. A second layer of amorphous hydrogenated silicon nitride film is deposited on top of the wet chemical oxide or amorphous silicon film. This deposition is then followed by annealing to further enhance the surface passivation.
Abstract:
This disclosure presents mobile vacuum carriers that may be used to support thin substrates that would otherwise be too brittle to transport and process. This disclosure relates to the processing of thin semiconductor substrates and has particular applicability to the fields of photovoltaic solar cells, semiconductor microelectronic integrated circuits, micro-electro- mechanical systems (MEMS), optoelectronic devices (such as light-emitting diodes, lasers, photo detectors), data storage devices, etc.
Abstract:
A back contact back junction solar cell using semiconductor wafers and methods for manufacturing are provided. The back contact back junction solar cell comprises a semiconductor wafer having a doped base region, a light capturing front side surface, and a doped backside emitter region. A front side and backside dielectric layer and passivation layer provide enhance light trapping and internal reflection. Backside base and emitter contacts are connected to metal interconnects forming a metallization pattern of interdigitated fingers and busbars on the backside of the solar cell.
Abstract:
The present disclosure enables high-volume cost effective production of three- dimensional thin film solar cell (3-D TFSC) substrates. First, the present disclosure discloses pyramid-like unit cell structure 16 and 50 which enable epitaxial growth through their open pyramidal structure. The present disclosure than gives four 3-D TFSC embodiments 70, 82, 100, and 110 which may combined as necessary. A basic 3-D TFSC having a substrate, emitter, oxidation on the emitter, front and back metal contacts allows simple processing. Other embodiments disclose a selective emitter, selective backside metal contact, and front-side SiN ARC layers. Several processing methods including process flows 150, 200, 250, 300, and 350 enable production of these 3-D TFSC. Further, the present disclosure enables higher throughput through the use of dual sided template 400. By processing the substrate in the template, the present disclosure increases yield and reduces processing steps.
Abstract:
The present disclosure relates to methods for selectively etching a porous semiconductor layer to separate a thin-film semiconductor substrate (TFSS) having planar or three-dimensional features from a corresponding semiconductor template. The method involves forming a conformal sacrificial porous semiconductor layer on a template. Next, a conformal thin film silicon substrate is formed on top of the porous silicon layer. The middle porous silicon layer is then selectively etched to separate the TFSS and semiconductor template. The disclosed advanced etching chemistries and etching methods achieve selective etching with minimal damage to the TFSS and template.
Abstract:
A method is provided for fabricating a thin-film semiconductor substrate by forming a porous semiconductor layer conformally on a reusable semiconductor template and then forming a thin-film semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the thin-film semiconductor substrate is formed on the thin-film semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the thin-film semiconductor substrate and is positioned between the inner trench and the edge of the thin-film semiconductor substrate. The thin-film semiconductor substrate is then released from the reusable semiconductor template.