Abstract:
A digital phase-locked loop having a phase frequency detector (PFD), a 3-state phase frequency detection converter (3-state PFD converter), a loop filter and a digital voltage-controlled oscillator is provided. The PFD receives an input frequency and a reference frequency and outputs a first signal and a second signal based on the phase difference between the input frequency and the reference frequency. The 3-state PFD converter outputs a 3-state signal according to the first and second signals, wherein the 3-state signal is presented in 1, 0 and -I. The loop filter outputs at least one control bit based on only the 3-state signal. The DCO adjusts the outputted oscillation frequency according to the control bit.
Abstract:
An amplification circuit includes a radio-frequency input terminal, a radio-frequency output terminal, a first amplification stage circuit, a second amplification stage circuit, and a variable impedance path. The radio-frequency input terminal is used to receive a radio-frequency signal. The radio-frequency output terminal is used to output the amplified radio-frequency signal. The first amplification stage circuit is coupled to the radio-frequency input terminal and the radio-frequency output terminal. The second amplification stage circuit is coupled to the radio-frequency input terminal and the radio-frequency output terminal. The variable impedance path is coupled to the first amplification stage circuit and the second amplification stage circuit. When the second amplification stage circuit is enabled, the variable impedance path has a low impedance. When the second amplification stage circuit is disabled, the variable impedance path has a high impedance.
Abstract:
A coupler structure includes a main signal line, a first coupling line, a second coupling line and a spacer element. The main signal line is located on a first plane, the first coupling line is located on a second plane, and the second coupling line is located on a third plane, wherein the second plane and the third plane are both in parallel with the first plane, and the second plane and the third plane are both different from the first plane. The spacer element is connected to the main signal line. The projection of the spacer element on the first plane is located between the projection of the first coupling line on the first plane and the projection of the second coupling line on the first plane. The main signal line, the first coupling line and the second coupling line extend along a virtual line.
Abstract:
An amplify device and a semiconductor device are provided in the disclosure. The amplify device includes an amplify unit, a radio frequency signal combination circuit, a first conductive wire and a second conductive wire. The first conductive wire is coupled between an output end of the amplify unit and a first input end of the radio frequency signal combination circuit. The second conductive wire is coupled between the output end of the amplify unit and a second input end of the radio frequency signal combination circuit. Wherein, a length of the first conductive wire is different from a length of the second conductive wire.
Abstract:
A radio frequency (RF) amplifier and a bias circuit are provided. The RF amplifier includes an amplifier, a first inductive-capacitive resonance circuit, and a first bias circuit. The amplifier includes an input terminal configured to receive an incoming RF signal through a first RF path. The first inductive-capacitive resonance circuit includes a first terminal coupled to a first reference voltage. A second terminal of the first inductive-capacitive resonance circuit is coupled to the first RF path. In response to the first reference voltage being at a first reference level, the RF amplifier is enabled; in response to the first reference voltage being at a second reference level, the RF amplifier is disabled. The first bias circuit includes a first terminal configured to be coupled to the first reference voltage and a second terminal coupled to the input terminal of the amplifier to provide a first direct current (DC) component.
Abstract:
A semiconductor device may include a compound substrate and a 3-dimensional inductor structure. The compound substrate may include a front surface and a back surface. The 3-dimensional inductor structure may include a front conductive stack, a back conductive layer, and at least one through-hole structure. At least one portion of the front conductive stack may include a first conductive layer disposed on the front surface of the compound substrate, and a second conductive layer disposed on the first conductive layer. The second conductive layer has a thickness ranging between 30 micrometers and 400 micrometers. The back conductive layer is disposed on the back surface of the compound substrate. The at least one through-hole structure penetrates through the compound substrate, and electrically connects the front conductive stack to the back conductive layer.
Abstract:
An object recognition method includes generating Doppler spectrogram data according to an echo signal, the echo signal being relating to an object; transforming N sets of time-domain data of the Doppler spectrogram data corresponding to N velocities into N sets of cadence spectrogram data, respectively; combining the N sets of spectrogram data to obtain 1D/2D cadence spectrum data, and acquiring a series of cadence feature from the 1D/2D cadence spectrum data to recognize the object.
Abstract:
An amplifier circuit having an adjustable gain is provided. The amplifier circuit includes an input terminal, an output terminal, an amplifier, and an attenuation circuit. The input terminal receives an input signal, which is in turn received by an input terminal of the amplifier. An output terminal of the amplifier outputs the input signal that is amplified. The attenuation circuit is coupled between the output terminal of the amplifier and the output terminal to provide a plurality of attenuation to the input signal that is amplified and generate a first attenuation signal, or between the input terminal and the output terminal to provide the plurality of attenuations to the input signal and generate a second attenuation signal. A difference between an impedance value of the input terminal of the attenuation circuit and an impedance value of the output terminal of the attenuation circuit is within a predetermined range.
Abstract:
A filter integrated circuit, including an acoustic wave filter chip and a matching circuit, is provided. The acoustic wave filter chip is covered upon a substrate. The matching circuit is disposed on the substrate to provide matching impedance to the acoustic wave filter chip. A first pad and a second pad of the matching circuit are respectively connected to a first signal terminal and a second signal terminal of the acoustic wave filter chip. First terminals of a first coil inductor and a second coil inductor of the matching circuit are respectively connected to the first pad and the second pad of the substrate. The first coil inductor is adjacent to the second coil inductor, so that mutual inductance and parasitic capacitance are formed, so that the matching circuit and the acoustic wave filter chip jointly generate a transmission zero point located in a triple fundamental frequency range.
Abstract:
A radio frequency switch circuit includes a series circuit. The series circuit includes a first series connection group and a second series connection group. The first series connection group includes a plurality of first transistors. The second series connection group includes a plurality of second transistors. Control terminals of the first transistors are all coupled to a first control node. Control terminals of the second transistors are all coupled to a second control node. When an electrostatic discharge event occurs, a voltage at the first control node is different from a voltage at the second control node. In a normal operation state, a switch state of the first series connection group and a switch state of the second series connection group are the same as each other.