RADIO FREQUENCY SWITCH CIRCUIT
    1.
    发明公开

    公开(公告)号:US20240305294A1

    公开(公告)日:2024-09-12

    申请号:US18330380

    申请日:2023-06-07

    Inventor: Ching-Yao Pai

    CPC classification number: H03K17/693 H03K17/162 H03K19/00361

    Abstract: A radio frequency switch circuit includes a series circuit. The series circuit includes a first series connection group and a second series connection group. The first series connection group includes a plurality of first transistors. The second series connection group includes a plurality of second transistors. Control terminals of the first transistors are all coupled to a first control node. Control terminals of the second transistors are all coupled to a second control node. When an electrostatic discharge event occurs, a voltage at the first control node is different from a voltage at the second control node. In a normal operation state, a switch state of the first series connection group and a switch state of the second series connection group are the same as each other.

    Integrated Circuit with Electrostatic Discharge Protection

    公开(公告)号:US20210135451A1

    公开(公告)日:2021-05-06

    申请号:US17083323

    申请日:2020-10-29

    Abstract: An integrated circuit includes a signal pad, receiving an input signal during a normal mode, and receive an ESD signal during an ESD mode; an internal circuit, processing the input signal during the normal mode; a variable impedance circuit, comprising a first end coupled to the signal pad, a second end coupled to the internal circuit, wherein the variable impedance circuit provides a low or high impedance path between the signal pad and the internal circuit during the normal or ESD mode; and a switch circuit, comprising a first end coupled to a control end of the variable impedance circuit, a second end coupled to a reference voltage terminal, and a control end receiving a node voltage, wherein the switch circuit switches the control end of the variable impedance circuit to have a first specific voltage or be electrically floating during the normal or ESD mode.

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT

    公开(公告)号:US20250169194A1

    公开(公告)日:2025-05-22

    申请号:US18398178

    申请日:2023-12-28

    Abstract: Disclosed is an electrostatic discharge (ESD) protection circuit including a main transistor, a resistor element and a control circuit. A first voltage terminal is coupled to a second terminal of the main transistor and a first terminal of the resistor element. A second voltage terminal is coupled to a first terminal of the main transistor. The control circuit is coupled between a second terminal of the resistor element and a control terminal of the main transistor. When an ESD event occurs, the product of the capacitance value of a parasitic capacitance of the control circuit and the resistance value of the resistor element is greater than the duration of the ESD event, and the control circuit turns on the main transistor so that an ESD current flows through the main transistor.

    TRANSISTOR STACK CIRCUIT
    4.
    发明申请

    公开(公告)号:US20250167542A1

    公开(公告)日:2025-05-22

    申请号:US18397960

    申请日:2023-12-27

    Abstract: A transistor stack circuit including a first signal transmission port, a second signal transmission port, an impedance unit, a plurality of transistors, and a plurality of resistors is provided. The transistors are connected in series and coupled between the first signal transmission port and the second signal transmission port. A first terminal of each resistor is coupled to a common path. A second terminal of each resistor is coupled to a control terminal of a corresponding transistor among the transistors. The impedance unit is coupled between the common path and a reference voltage terminal. When an electrostatic discharge event occurs, an impedance value of the impedance unit is greater than twice of a resistance value of each resistor, and the transistors form a low-impedance path.

    Integrated circuit with electrostatic discharge protection

    公开(公告)号:US11705725B2

    公开(公告)日:2023-07-18

    申请号:US17083323

    申请日:2020-10-29

    CPC classification number: H02H9/046 H01L27/0255 H01L27/0266 H01L27/0288

    Abstract: An integrated circuit includes a signal pad, receiving an input signal during a normal mode, and receive an ESD signal during an ESD mode; an internal circuit, processing the input signal during the normal mode; a variable impedance circuit, comprising a first end coupled to the signal pad, a second end coupled to the internal circuit, wherein the variable impedance circuit provides a low or high impedance path between the signal pad and the internal circuit during the normal or ESD mode; and a switch circuit, comprising a first end coupled to a control end of the variable impedance circuit, a second end coupled to a reference voltage terminal, and a control end receiving a node voltage, wherein the switch circuit switches the control end of the variable impedance circuit to have a first specific voltage or be electrically floating during the normal or ESD mode.

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