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公开(公告)号：KR1020040064925A
公开(公告)日：2004-07-21
申请号：KR1020030001814
申请日：2003-01-11
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: H01L21/28273 , H01L29/42324 , H01L29/513 , H01L29/66825 , H01L29/7881
Abstract: PURPOSE: A cell structure of an EEPROM device and a fabricating method thereof are provided to erase easily charges of programmed cells by forming windows on both sides of the first floating gate. CONSTITUTION: A cell structure of an EEPROM device includes a stack part and a floating gate transistor part. The stack part includes a semiconductor substrate, a first floating gate, a nitride layer pattern, a control gate, and a window. The first floating gate(107b), the nitride layer pattern(115b) including a nitride layer, and the control gate(117) are formed on the semiconductor substrate(101). The window(129) is formed on both sides of the first floating gate to erase charges of the first floating gate. The floating gate transistor part includes a gate insulating layer, a second floating gate, and a source/drain. The gate insulating layer is formed on the semiconductor substrate. The second floating gate is formed on the gate insulating layer. The source/drain is aligned to the second floating gate.
Abstract translation: 目的：提供EEPROM器件的单元结构及其制造方法，通过在第一浮栅的两侧形成窗口来容易地擦除编程单元的电荷。 构成：EEPROM器件的单元结构包括堆叠部分和浮动栅极晶体管部分。 堆叠部分包括半导体衬底，第一浮动栅极，氮化物层图案，控制栅极和窗口。 在半导体衬底（101）上形成有第一浮栅（107b），包括氮化物层的氮化物层图案（115b）和控制栅极（117）。 窗口（129）形成在第一浮动栅极的两侧以擦除第一浮动栅极的电荷。 浮栅晶体管部分包括栅极绝缘层，第二浮栅和源极/漏极。 栅极绝缘层形成在半导体衬底上。 第二浮栅形成在栅极绝缘层上。 源极/漏极与第二个浮动栅极对准。
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公开(公告)号：KR1020160044269A
公开(公告)日：2016-04-25
申请号：KR1020140139067
申请日：2014-10-15
Applicant: 삼성전자주식회사
CPC classification number: A61B5/0402 , A61B5/0022 , A61B5/1113 , A61B5/1116 , A61B5/1118 , A61B5/1123 , A61B5/486 , A61B5/681 , A61B5/6824 , A61B5/6895 , A61B5/7405 , A61B5/742 , A61B2503/10 , A61B2505/09 , A61B2562/0219 , A61B2562/0223 , A61B2562/0257 , G06F19/00 , G06F19/3481 , G16H20/30
Abstract: 개시된운동관리방법은웨어러블디바이스에의한운동관리방법으로서, 사용자에게필요한운동량에대한제 1 정보를수신하는단계; 사용자의현재운동상태에대한제 2 정보를획득하는단계; 상기제 1 정보와제 2 정보를비교하고, 비교결과를사용자에게출력하는관리단계;를포함한다. 이러한웨어러블디바이스를착용하고운동을하는사용자는목표운동량달성에적합한운동관리서비스를제공받을수 있다.
Abstract translation: 公开了一种通过使用可穿戴装置来管理锻炼的方法，所述方法包括：接收关于用户所需的锻炼量的第一信息的步骤; 获得关于用户的当前运动量的第二信息的步骤; 以及管理步骤，比较第一信息和第二信息，并将比较结果输出给用户。 穿戴穿戴式装置时练习的用户可以具有适合于实现目标运动量的运动管理服务。
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公开(公告)号：KR1020160028229A
公开(公告)日：2016-03-11
申请号：KR1020140117025
申请日：2014-09-03
Applicant: 삼성전자주식회사
IPC: A61B5/1455
CPC classification number: G01N33/49 , A61B5/0075 , A61B5/14532 , A61B5/1455 , A61B5/7246 , G01N21/552 , G01N21/65 , G01N2021/3595
Abstract: 비침습당화혈색소검사장치및 방법이개시된다. 개시된비침습당화혈색소검사장치는, 피검체에제1광을조사하고, 피검체로부터나온제1광에대한제1정보를검출하는제1 광측정부와, 상기피검체에제2광을조사하고, 피검체로부터나온제2광에대한제2정보를검출하는제2 광측정부를포함하고, 제1정보와제2정보를이용하여당화혈색소에관련된정보를도출할수 있다.
Abstract translation: 公开了用于测试糖化血红蛋白的非侵入性装置和非侵入性方法。 用于测试糖化血红蛋白的非侵入性装置包括：第一光测量单元，用于将第一光照射到待测试对象，并检测关于从待测对象反射的第一光的第一信息; 以及第二光测量单元，用于将第二光照射到待测试对象，并检测关于从待测对象反射的第二光的第二信息。 用于测试糖化血红蛋白的非侵入性装置可以通过使用第一信息和第二信息来绘制与糖化血红蛋白相关的信息。 用于测试糖化血红蛋白的非侵入性装置可以以简单的方式测试糖化血红蛋白，而不从待测对象中收集血液。
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公开(公告)号：KR1020160019777A
公开(公告)日：2016-02-22
申请号：KR1020140104534
申请日：2014-08-12
Applicant: 삼성전자주식회사
CPC classification number: A61B5/1455 , A61B5/14546 , A61B2562/0233
Abstract: 비침습생체측정장치및 비침습생체측정방법에관해개시되어있다. 개시된비침습생체측정장치는피검체의제1 부위에서제1 물질에대한정보를획득하고, 동일피검체의제2 부위에존재하는제2 물질에대한정보를출력하도록구성될수 있다. 상기비침습생체측정장치는피검체의제1 부위에서제1 물질에대한정보를포함하는로우데이터(raw data)를획득하는데이터획득부(측정부) 및상기제1 물질에대한정보에기초해서제2 물질에대한정보를도출하는데이터처리부를포함할수 있다. 예컨대, 상기제1 부위는피부/조직일수 있고, 상기제2 부위는혈액일수 있다.
Abstract translation: 公开了一种用于测量活体的非侵入性装置和用于测量活体的非侵入性方法。 所公开的用于测量生物体的非侵入性装置包括：获得关于待检查对象的第一部分中的第一物质的信息; 并输出相对于同一被检查物体的第二部分存在的第二物质的信息。 用于测量生物体的非侵入性装置包括：数据获取单元（测量单元），用于获得包括关于待检查对象的第一部分中的第一物质的信息的原始数据; 以及数据处理单元，用于基于关于第一物质的信息来扣除关于第二物质的信息。 例如，第一部分可以是皮肤/组织，第二部分可以是血液。
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Patent Agency Ranking
公开(公告)号：KR1020160019776A
公开(公告)日：2016-02-22
申请号：KR1020140104533
申请日：2014-08-12
Applicant: 삼성전자주식회사
IPC: A61B5/1455
CPC classification number: A61B5/4244 , A61B5/004 , A61B5/0075 , A61B5/14546 , A61B5/1455 , A61B2562/0233 , A61B2576/02
Abstract: 비침습간기능검사장치및 비침습간기능검사방법이개시된다. 개시된비침습간기능검사장치는, 피검체에광을조사하는광원, 상기피검체로부터나온광에대한정보를이용하여상기피검체를구성하는적어도하나의대상물질에관련된로데이터를추출하는로데이터추출부, 및상기로데이터로부터상기적어도하나의대상물질과상관관계를가지는간 기능에관련된정보를추출하는데이터처리부를포함한다.
Abstract translation: 提供了一种用于检测肝功能的非侵入性装置和用于测试肝功能的非侵入性方法。 用于测试肝功能的非侵入性装置包括：在受试者上发光的光源; 原始数据提取部分，使用关于来自所述对象的光的信息提取与构成所述对象的至少一个目标材料相关的原始数据; 以及数据处理部，其从与至少一个目标材料相关的原始数据提取与肝功能相关的信息。
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公开(公告)号：KR1020140075463A
公开(公告)日：2014-06-19
申请号：KR1020120143830
申请日：2012-12-11
Applicant: 삼성전자주식회사
CPC classification number: G01N21/75 , G01N21/78 , G01N2021/7796
Abstract: Provided are an ion measuring device of electrolytes which can provide a constant pH condition to an optode and an ion measuring method of electrolytes. The ion measuring device of electrolytes comprises an optode located on a first substrate and buffer located on a second substrate facing to the first substrate. More specifically, the ion measuring device of electrolytes additionally comprises a spacer between the first and the second substrate.
Abstract translation: 提供了一种电解质的离子测量装置，其可以为光电提供恒定的pH条件和电解质的离子测量方法。 电解质的离子测量装置包括位于第一衬底上的光栅和位于面向第一衬底的第二衬底上的缓冲器。 更具体地，电解质离子测量装置还包括在第一和第二基底之间的间隔物。
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38.发明授权이피롬(ＥＰＲＯＭ, ＥｒａａｂｌｅＰｒｏｇｒａｍｍａｂｌｅ Ｒｅａｄ ＯｎｌｙＭｅｍｏｒｙ} 소자의 셀 구조 및 그 제조방법 失效피롬（EPROM，EraableProgrammable Read OnlyMemory）소자의셀구조및그제조방
公开(公告)号：KR100464443B1
公开(公告)日：2005-01-03
申请号：KR1020030001815
申请日：2003-01-11
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
Abstract: A cell structure of a non-volatile memory device, which uses a nitride layer as a floating gate spacer, includes a gate stack and a floating gate transistor formed over a semiconductor substrate. The gate stack includes a first portion of a floating gate, a control gate formed over the first portion of the floating gate, and a non-nitride spacer adjacent to sidewalls of the first portion of floating gate. The floating gate transistor includes a second portion of the floating gate, which substantially overlaps a source and/or drain formed in the substrate. The application of ultraviolet rays to the non-nitride spacer of a programmed cell can causes the second portion of the floating gate to discharge, thereby easily erasing the programmed cell.
Abstract translation: 使用氮化物层作为浮栅隔离物的非易失性存储器件的单元结构包括形成在半导体衬底上的栅极堆叠和浮置栅极晶体管。 栅极叠层包括浮置栅极的第一部分，形成在浮置栅极的第一部分上方的控制栅极以及与浮置栅极的第一部分的侧壁相邻的非氮化物间隔物。 浮动栅极晶体管包括浮动栅极的第二部分，其基本上与形成在衬底中的源极和/或漏极重叠。 将紫外线施加到已编程单元的非氮化物隔离物上会导致浮栅的第二部分放电，从而容易擦除已编程的单元。
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39.发明授权이피롬(ＥＰＲＯＭ, ＥｒａａｂｌｅＰｒｏｇｒａｍｍａｂｌｅ Ｒｅａｄ ＯｎｌｙＭｅｍｏｒｙ)소자의 셀 구조 및 그 제조방법 失效피피롬（EPROM，EraableProgrammable Read OnlyMemory）소자의셀구조및그제조방
公开(公告)号：KR100464442B1
公开(公告)日：2005-01-03
申请号：KR1020030001814
申请日：2003-01-11
Applicant: 삼성전자주식회사
IPC: H01L27/115
CPC classification number: H01L21/28273 , H01L29/42324 , H01L29/513 , H01L29/66825 , H01L29/7881
Abstract: Provided are a cell structure of an EPROM device and a method for fabricating the same. The cell structure includes a gate stack, which includes a first floating gate, an insulating pattern including a nitride layer, and a control gate that are sequentially stacked on a semiconductor substrate, and includes a window for exposing the top surface or both sidewalls of the first floating gate on both sides of the control gate, so that charges of the first floating gate can be erased by ultraviolet rays. The cell structure further includes a floating gate transistor, which includes a gate insulating layer formed on the semiconductor substrate, a second floating gate that is formed on the gate insulating layer and is connected to the first floating gate in the gate stack, and a source/drain that is formed in the semiconductor substrate so as to be aligned to the second floating gate. In the cell structure, the window is formed on the top surface or both sidewalls of the first floating gate of the gate stack. Thus, ultraviolet rays can penetrate through the window and easily erase charges of the programmed cell.
Abstract translation: 提供了一种EPROM器件的单元结构及其制造方法。 所述单元结构包括栅极叠层，其包括第一浮置栅极，包括氮化物层的绝缘图案以及控制栅极，所述绝缘图案顺序地堆叠在半导体衬底上，并且包括用于暴露所述第一浮置栅极的顶表面或两个侧壁 第一浮置栅极位于控制栅极的两侧，使得第一浮置栅极的电荷可以被紫外线消除。 该单元结构进一步包括浮置栅极晶体管，该浮置栅极晶体管包括形成在半导体衬底上的栅极绝缘层，形成在栅极绝缘层上并连接到栅极堆叠中的第一浮置栅极的第二浮置栅极， /漏极，其形成在半导体基板中以便与第二浮置栅极对准。 在单元结构中，窗口形成在栅极堆叠的第一浮置栅极的顶表面或两个侧壁上。 因此，紫外线可穿透窗口并容易擦除已编程单元的电荷。
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公开(公告)号：KR1020040054361A
公开(公告)日：2004-06-25
申请号：KR1020020081393
申请日：2002-12-18
Applicant: 삼성전자주식회사
IPC: G11C11/40
CPC classification number: G11C8/16
Abstract: PURPOSE: A double port semiconductor memory device is provided to reduce an area occupied by an isolation area formed at a boundary between a N-well and a P-well. CONSTITUTION: A semiconductor substrate includes a memory cell divided into a N-well and a P-well. The semiconductor memory device includes the first word line, the second word line, the first bit line and the second bit line. The first CMOS inverter includes the first NMOS transistor(N1), the first PMOS transistor(P1) and an input terminal and an output terminal. The second CMOS inverter includes the second NMOS transistor(N2), the second PMOS transistor(P2) and an input terminal and an output terminal. The third NMOS transistor(N3) has a gate connected to the first word line, and a drain connected to the first bit line and a source connected to the first memory node(N1). The fourth NMOS transistor(N4) has a gate connected to the first word line, a drain connected to the first bit line and a source connected to the second memory node(N2). The fifth NMOS transistor(N5) has a gate connected to the first memory node and a source connected to a ground line. And the sixth NMOS transistor(N6) has a gate connected to the second word line, a source connected to the drain of the fifth NMOS transistor and a drain connected to the second bit line.
Abstract translation: 目的：提供双端口半导体存储器件，以减少形成在N阱和P阱之间的边界处的隔离区所占据的面积。 构成：半导体衬底包括分为N阱和P阱的存储单元。 半导体存储器件包括第一字线，第二字线，第一位线和第二位线。 第一CMOS反相器包括第一NMOS晶体管（N1），第一PMOS晶体管（P1）和输入端子以及输出端子。 第二CMOS反相器包括第二NMOS晶体管（N2），第二PMOS晶体管（P2）和输入端子以及输出端子。 第三NMOS晶体管（N3）具有连接到第一字线的栅极，连接到第一位线的漏极和连接到第一存储器节点（N1）的源极。 第四NMOS晶体管（N4）具有连接到第一字线的栅极，连接到第一位线的漏极和连接到第二存储器节点（N2）的源极。 第五NMOS晶体管（N5）具有连接到第一存储器节点的栅极和连接到地线的源极。 并且第六NMOS晶体管（N6）具有连接到第二字线的栅极，连接到第五NMOS晶体管的漏极的源极和连接到第二位线的漏极。
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