公开(公告)号：KR1020160078550A

公开(公告)日：2016-07-05

申请号：KR1020140187821

申请日：2014-12-24

Applicant: 전자부품연구원

Inventor： 윤상훈 ,  최광호 ,  임기택 ,  신대교 ,  정한균 ,  진성근

IPC: H04B7/145

CPC classification number: H04B7/145

Abstract: 통신거리확장을위한패시브중계장치가제공된다. 본발명의실시예에따른통신중계장치는, 차량으로부터수신되는전파를비가시영역으로반사시키는반사판과반사판을지중에지지하는지지대를포함한다. 이에의해, 차량(단말) 간또는차량(단말)과기지국간의통신가능거리를증가시켜, 통신의신뢰성을확대시키고, 통신오류로인해발생할수 있는문제들을최소화할수 있게된다.

Abstract translation: 提供了一种用于延长通信距离的无源中继装置。 根据本发明实施例的通信中继装置包括：将从车辆接收的无线电波反射到不可见区域的反射板; 以及支撑地下反射板的支架。 因此，通过增加车辆（终端）之间或车辆（终端）与基站之间的通信的距离是可能的，可以提高通信的可靠性，并且可以最小化由于通信错误而可能发生的问题。

公开(公告)号：KR100776978B1

公开(公告)日：2007-11-21

申请号：KR1020060096820

申请日：2006-09-30

Applicant: 전자부품연구원

Inventor： 조삼구 ,  최광호 ,  손행선

IPC: H04B1/40

CPC classification number: H04B1/719 ,  H04B1/44 ,  H04B1/71635 ,  H04B1/71637 ,  H04B1/7176

Abstract: A UWB(Ultra Wide Band) transceiver for preventing an interference error, a transmission method and a reception method are provided to multiplex the same transmission data packets with plural time slots or plural frequency channels during UWB communication, thereby easily preventing the interference error in a receiving port. A UWB transmitter comprises an error prevention encoder(24) for consecutively allocating a single transmission data packet to plural consecutive time slots which constitute one transmission frame. A UWB receiver comprises an error prevention decoder(34) for preventing a reception error by comparing plural reception data packets based on the single transmission data packet allocated to the plural consecutive time slots from a receiving frame.

Abstract translation: 提供了用于防止干扰错误的UWB（超宽带）收发器，发送方法和接收方法，以在UWB通信期间复用具有多个时隙或多个频率信道的相同发送数据分组，从而容易地防止在 接收端口。 UWB发射机包括用于连续地将单个传输数据分组分配给构成一个传输帧的多个连续时隙的防错编码器（24）。 UWB接收机包括防错解码器（34），用于基于从接收帧分配给多个连续时隙的单个发送数据分组来比较多个接收数据分组来防止接收错误。

公开(公告)号：KR100737811B1

公开(公告)日：2007-07-10

申请号：KR1020060096770

申请日：2006-09-30

Applicant: 전자부품연구원

Inventor： 조삼구 ,  최광호 ,  손행선

IPC: H04B1/16

Abstract: An apparatus and a method for receiving a dual mode UWB(Ultra Wide Band) signal are provided to effectively control network resources by changing detection mode of a receiving apparatus to a coherent or non-coherent detect mode. A coherent detecting unit(100) detects a UWB reception signal by using a template signal. A non-coherent detecting unit(200) detects a UWB reception signal without using a template signal. A detect mode selecting unit(300) adaptively selects one of a coherent mode in which the coherent detecting unit(100) is used and a non-coherent mode in which the non-coherent detecting unit(200) is used.

Abstract translation: 提供了用于接收双模式UWB（超宽带）信号的装置和方法，以通过将接收装置的检测模式改变为相干或非相干检测模式来有效地控制网络资源。 相干检测单元（100）通过使用模板信号来检测UWB接收信号。 非相干检测单元（200）在不使用模板信号的情况下检测UWB接收信号。 检测模式选择单元（300）自适应地选择使用相干检测单元（100）的相干模式和使用非相干检测单元（200）的非相干模式中的一个。

公开(公告)号：KR100635537B1

公开(公告)日：2006-10-18

申请号：KR1020050108658

申请日：2005-11-14

Applicant: 전자부품연구원

Inventor： 최광호 ,  조삼구

IPC: H03K5/153

Abstract: An ultra-wide band(UWB) pulse signal generator is provided to obtain the desired wave pattern of pulse by using a memory device in which the digital data of pre-calculated and pre-shaped pulse wave pattern is memorized, and a digital to analog (D/A) converter. An ultra-wide band(UWB) pulse signal generator comprises a pulse wave pattern memory(220), an address counter(210), a D/A converter(230) and a band pass filter(240). The pulse wave pattern memory(220) stores a pre-shaped pulse wave pattern data. The address counter(210) generates an address for reading the pre-shaped pulse wave pattern data based on a clock. The D/A converter(230) converts the pre-shaped pulse wave pattern data outputted from the pulse wave pattern memory(220) corresponding to the address generated by the address counter(210) into analog data based on the clock. The band pass filter(240) passes the desired band signal to make the pre-shaped pulse wave pattern data which is converted into the analog signal, to the desired frequency spectrum.

Abstract translation: 提供超宽带（UWB）脉冲信号发生器，以通过使用其中存储有预先计算和预成形的脉冲波形的数字数据的存储器装置来获得期望的脉冲波形，并且数字到模拟 （D / A）转换器。 超宽带（UWB）脉冲信号发生器包括脉冲波形图存储器（220），地址计数器（210），D / A转换器（230）和带通滤波器（240）。 脉波图案存储器（220）存储预成形的脉波图案数据。 地址计数器（210）基于时钟产生用于读取预先整形的脉搏波形图数据的地址。 D / A转换器（230）将从地址计数器（210）生成的地址所对应的脉波图形存储器（220）输出的预先整形的脉波图形数据转换成基于该时钟的模拟数据。 带通滤波器（240）传递期望的频带信号以将被转换为模拟信号的预成形的脉冲波形图案数据转换为期望的频谱。

公开(公告)号：KR100586532B1

公开(公告)日：2006-06-07

申请号：KR1020030043550

申请日：2003-06-30

Applicant: 전자부품연구원

Inventor： 서정욱 ,  위정욱 ,  최광호 ,  조용수

IPC: H04L27/26

Abstract: 본 발명은 전송방식으로 직교 주파수 분할 다중을 사용하는 IEEE 802.11a 무선랜 시스템에 다중입력 다중출력-직교 주파수 분할 다중 기법을 적용하는 경우 동기부를 위한 새로운 프리앰블 구조에 관한 것이다.
본 발명의 다중입력 다중출력-직교 주파수 분할 다중 방식을 사용하는 무선랜 시스템의 동기부를 위한 프리앰블 구조는 짧은 훈련심볼을 첫 번째 송신 안테나에만 전송하는 단계; 긴 훈련심볼을 널링 방식으로 송신 안테나에 전송하는 단계; 및 직교 패턴을 전송하는 단계로 이루어짐에 기술적 특징이 있다.
따라서, 본 발명의 다중입력 다중출력-직교 주파수 분할 다중 방식을 사용하는 무선랜 시스템의 동기부를 위한 프리앰블 구조는 다양한 다중입력 다중출력-직교 주파수 분할 다중 기법 및 다이버시티 기법에 적용이 가능하며, 신호검출, 심볼옵셋추정 및 보정, 주파수 옵셋 추정 및 보정, 채널추정 등의 동기부 설계에 효과적이므로 시스템 성능을 크게 향상시키는 효과가 있다.
직교 주파수 분할 다중, 다중입력 다중출력, 무선랜, 프리앰블

公开(公告)号：KR1020060005046A

公开(公告)日：2006-01-17

申请号：KR1020040053874

申请日：2004-07-12

Applicant: 전자부품연구원

Inventor： 조삼구 ,  이성철 ,  곽재민 ,  최광호

IPC: H04B15/00

CPC classification number: H04B15/005 ,  H04B1/40

Abstract: 본 발명은 UWB 송수신 시스템에 관한 것으로서, UWB 송수신기에서 자신의 송신기에서 발사된 신호가 수신단으로 되먹임 되는 신호를 줄여 송수신기의 Noise를 감소시키고 SNR을 향상시키는 장치 및 방법을 제공한다. 송신기에서 발사된 신호와 수신기에 수신된 신호를 비교하여 두신호의 차이를 계산하고, 송신기 출력 신호의 시간지연과 크기의 계산하여 송신기의 출력신호의 위상과 시간지연, 크기를 결정한다. 이 결정된 신호는 수신기의 수신된 신호에서 감산되어 송신기에서 발생한 신호가 수신단으로 유입되는 것을 줄인다. 또한 UWB 송수신기에서 송신기의 사용 클럭과 수신기의 사용클럭 위상을 변화하거나 동작 시간을 다르게 하여 클럭에 의하여 발생한 노이즈를 각각의 송신기, 수신기에 영향을 주지 않도록 하여 노이즈를 줄일 수 있다.
UWB, 간섭, 피드백, 위상차, 진폭차, 잡음

公开(公告)号：KR1020050002207A

公开(公告)日：2005-01-07

申请号：KR1020030043550

申请日：2003-06-30

Applicant: 전자부품연구원

Inventor： 서정욱 ,  위정욱 ,  최광호 ,  조용수

IPC: H04L27/26

Abstract: PURPOSE: A preamble structure for a synchronization device of a wireless LAN system using a multiple-input multiple-output OFDM method is provided to improve performance by providing an excellent effect to a signal detection process, a symbol offset estimation and correction process, a frequency offset estimation/correction process, and a channel estimation process. CONSTITUTION: A preamble structure includes a short training symbol transmission process, a long training symbol transmission process, and an orthogonal pattern transmission process. The short training symbol transmission process is performed to transmit simultaneously short training symbols to all of transmission antennas. The long training symbol transmission process is performed to transmit simultaneously long training symbols to all of the transmission antennas. An orthogonal pattern transmission process is performed to transmit orthogonal patterns.

Abstract translation: 目的：提供使用多输入多输出OFDM方法的无线LAN系统的同步装置的前导码结构，通过对信号检测处理，符号偏移估计和校正处理，频率 偏移估计/校正处理以及信道估计处理。 构成：前导结构包括短训练符号发送处理，长训练符号发送处理和正交模式发送处理。 执行短训练符号发送处理以将所有发送天线同时发送短训练符号。 执行长训练符号发送处理以将所有发送天线同时发送长训练符号。 执行正交模式发送处理以发送正交模式。

公开(公告)号：KR100443424B1

公开(公告)日：2004-08-09

申请号：KR1020020035113

申请日：2002-06-22

Applicant: 전자부품연구원

Inventor： 조경연 ,  최광호 ,  임기택

IPC: H04L12/851

Abstract: PURPOSE: A method for efficiently processing packets in a home gateway system is provided to consider priorities of the packets in a home gateway, and to consider situations of a device connected to a home network, thereby efficiently processing home network packets. CONSTITUTION: A system confirms whether LGIs(LAN Gateway Interfaces)/WGIs(WAN Gateway Interfaces) are ready to receive packets. If so, packets having higher priorities and standing by in a packet list of a home gateway are transmitted to the LGIs/WGIs. If the LGIs/WGIs are not ready to receive the packets, the priorities of the packets are reconfirmed to insert the packets into the packet list. The system inserts the packets inputted from the LGIs/WGIs into the nearest portion of packets having higher or the same priorities.

Abstract translation: 目的：提供一种在家庭网关系统中有效处理分组的方法，以考虑家庭网关中的分组的优先级，并考虑连接到家庭网络的设备的情况，从而有效地处理家庭网络分组。 构成：系统确认LGI（LAN网关接口）/ WGI（WAN网关接口）是否准备好接收数据包。 如果是这样，那么具有更高优先级并且在家庭网关的分组列表中待命的分组被发送到LGI / WGI。 如果LGIs / WGI没有准备好接收分组，则重新确认分组的优先级以将分组插入到分组列表中。 系统将从LGI / WGI输入的数据包插入到具有更高或相同优先级的数据包的最近部分。

公开(公告)号：KR1020040013968A

公开(公告)日：2004-02-14

申请号：KR1020020047120

申请日：2002-08-09

Applicant: 전자부품연구원

Inventor： 박부식 ,  최광호 ,  임기택 ,  위정욱 ,  서정욱

IPC: H04L12/28

Abstract: PURPOSE: An MAC(Media Access Control) processing device is provided to process data of downstream channels as simultaneously extracting overhead information, and to process an AAL5 in software, then to process ATM cells only in hardware, thereby updating exact slot counters and simplifying hardware. CONSTITUTION: An ESF(Extended Super Frame) buffer(102) generates an OH bit from an input bit stream. A bit2byte block(106) removes the OH bit from the supplied bit stream, and processes the bit stream in byte units. An HEC REC block(122) recovers or senses an error of an ATM cell. An ATM filter(124) separates unnecessary ATM cells. A synchronization block(104) adjusts frame synchronization. A scheduler(136) schedules data transmissions of upstream channels by using slot counter information and upstream channel control information. A CRC6 block(112) senses whether an error is generated from a frame. A receive connection buffer(132) extracts the upstream channel control information. A connection table(138) stores necessary information. A read controller(142) reads data to be transmitted to an upstream channel. A head adder(144) and an HEC block(146) configure ATM headers, and generate ATM cells. A ranging block(154) informs of starting time for transmitting data to the upstream channel. A de-interleaver block(108) restores interleaved data to original data.

Abstract translation: 目的：提供MAC（媒体访问控制）处理设备来处理下行信道的数据，同时提取开销信息，并以软件处理AAL5，然后仅在硬件中处理ATM信元，从而更新精确的时隙计数器并简化硬件 。 构成：ESF（扩展超帧）缓冲器（102）从输入比特流生成OH位。 位字节块（106）从提供的位流中移除OH位，并以字节为单位处理位流。 HEC REC块（122）恢复或感测ATM信元的错误。 ATM滤波器（124）分离不必要的ATM信元。 同步块（104）调整帧同步。 调度器（136）通过使用时隙计数器信息和上行信道控制信息来调度上游信道的数据传输。 CRC6块（112）检测是否从帧产生错误。 接收连接缓冲器（132）提取上行信道控制信息。 连接表（138）存储必要的信息。 读取控制器（142）读取要发送到上游信道的数据。 头加法器（144）和HEC块（146）配置ATM头，并产生ATM信元。 测距块（154）通知开始时间将数据发送到上行信道。 解交织器块（108）将交织的数据恢复到原始数据。

公开(公告)号：KR100413249B1

公开(公告)日：2004-01-03

申请号：KR1020010063845

申请日：2001-10-17

Applicant: 전자부품연구원

Inventor： 위정욱 ,  임기택 ,  최광호 ,  서정욱

IPC: H04N7/10

Abstract: PURPOSE: A device of processing an OOB(Out-Of-Band) physical layer of a POD(Point Of Deployment) module for an open cable is provided to process digital broadcasting data transmitted from a head end and data transmitted to the head end from a digital terminal with a combined method of DVS-178 and DVS-167 standards, thereby simplifying with one POD module. CONSTITUTION: An FDC(Forward Data Channel) block(210) comprises as follows. The first demultiplexer(211) selectively outputs digital broadcasting data of DVS-178 and DVS-167 standards. The DVS-178 standard digital broadcasting data is output to the first multiplexer through the first convolutional deinterleaver(212), the first R-S decoder(213), and the first derandomizer(214). The DVS-167 standard digital broadcasting data is output to the first multiplexer through the second derandomizer(215), the second convolutional deinterleaver(216), and the second R-S decoder. The first multiplexer transmits the DVS-178 and the DVS-167 digital broadcasting data to an upper layer by receiving a selection signal. An RDC(Reverse Data Channel) block(220) processes subscriber information or the digital data in a physical layer, and transmits the information and the data to a head end(100).

Abstract translation: 目的：提供一种处理用于开放电缆的POD（部署点）模块的OOB（带外）物理层的设备，以处理从头端传输的数字广播数据和传输到头端的数据， 采用DVS-178和DVS-167标准组合方式的数字终端，从而简化了一个POD模块。 构成：FDC（前向数据信道）块（210）包括如下。 第一解复用器（211）选择性地输出DVS-178和DVS-167标准的数字广播数据。 DVS-178标准数字广播数据通过第一卷积解交织器（212），第一R-S解码器（213）和第一解随机均衡器（214）输出到第一复用器。 通过第二解随机器（215），第二卷积解交织器（216）和第二R-S解码器将DVS-167标准数字广播数据输出到第一复用器。 第一多路复用器通过接收选择信号将DVS-178和DVS-167数字广播数据发送到上层。 RDC（反向数据信道）块（220）处理用户信息或物理层中的数字数据，并将该信息和数据发送到头端（100）。